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1. 发明授权

US4843339A Isolation amplifier including precision voltage-to-duty-cycle converter and low ripple, high bandwidth charge balance demodulator 失效
标题翻译：隔离放大器包括精密电压 - 占空比转换器和低纹波，高带宽电荷平衡解调器
公开(公告)号：US4843339A
公开(公告)日：1989-06-27
申请号：US114654
申请日：1987-10-28
申请人： Rodney T. Burt , Robert M. Stitt, II
发明人： Rodney T. Burt , Robert M. Stitt, II
IPC分类号： H03K9/08 , C08F220/04 , H03F3/217 , H03F3/38 , H03F3/387 , H03K7/08
CPC分类号： C08F220/04 , H03F3/387 , H03K7/08
摘要： An isolation amplifier includes a voltage-to-duty-cycle modulator, a non-galvanic isolation barrier, and a demodulator converting a duty-cycle-modulated signal transmitted across the isolation barrier to an analog voltage replica of the analog input voltage. The modulator circuit includes a first current switching means which produces a first current that is switched between positive and negative values in response to an output from a comparator that can be referenced to a noise-synchronized signal. The first current is summed with an input current and the difference is integrated and input to the comparator, the output of which produces the duty-cycle-modulated signal. The demodulator includes a second current switching circuit for producing a second current that is switched between positive and negative levels in response to the duty-cycle-modulated signal received across the isolation barrier and includes circuitry for algebraically summing the input current with the second current and integrating the result to produce the analog output voltage. The modulator circuit and demodulator circuits are fabricated on a single semiconductor area to produce the close matching between components of the first and second current switching circuits. The area is cut in half to produce two chips, which are connected to two isolation barrier capacitors. In the demodulator, a sample and hold circuit synchronized with the duty-cycle-modulated signal transmitted across the isolation barrier samples the output of the integrator.
摘要翻译：隔离放大器包括电压 - 占空比调制器，非电流隔离屏障和将跨隔离屏障传输的占空比调制信号转换为模拟输入电压的模拟电压副本的解调器。调制器电路包括第一电流开关装置，其响应于可以参考噪声同步信号的比较器的输出产生在正值和负值之间切换的第一电流。第一个电流与输入电流相加，差值被积分并输入到比较器，比较器的输出产生占空比调制信号。解调器包括第二电流切换电路，用于响应于在隔离屏障上接收的占空比调制信号产生在正电平和负电平之间切换的第二电流，并且包括用于将输入电流与第二电流进行代数求和的电路，以及将结果积分以产生模拟输出电压。调制器电路和解调器电路制造在单个半导体区域上，以产生第一和第二电流开关电路的部件之间的紧密匹配。该区域被切成两半以产生两个芯片，它们连接到两个隔离屏蔽电容器。在解调器中，与隔离屏障上传输的占空比调制信号同步的采样和保持电路对积分器的输出进行采样。

2. 发明授权

US4792748A Two-terminal temperature-compensated current source circuit 失效
标题翻译：两端温度补偿电流源电路
公开(公告)号：US4792748A
公开(公告)日：1988-12-20
申请号：US121652
申请日：1987-11-17
申请人： David M. Thomas , Rodney T. Burt , Robert M. Stitt, II
发明人： David M. Thomas , Rodney T. Burt , Robert M. Stitt, II
IPC分类号： H03F3/343 , C08F8/20 , G05F3/30 , H03F1/30 , H03F3/34 , H03F3/347 , G05F3/26
CPC分类号： G05F3/30 , C08F8/20 , Y10S323/907
摘要： A two-terminal temperature-compensated current source includes a first transistor having its emitter connected to a first terminal, its base connected to the base of a second transistor, and its collector coupled to a current mirror. The second transistor has its emitter coupled to the first terminal by a first resistor and its collector coupled to the current mirror. A second resistor is coupled between the first terminal and the base of the first transistor. The current mirror is coupled between a second terminal and the collectors of the first and second transistors so that all current supplied to the current mirror from the second terminal flows into the collectors of the first and second transistors. A third transistor has its base coupled to the collector of the first transistor, its emitter coupled to the base of the first transistor, and its collector coupled to the second terminal. The current in the first resistor has a positive temperature coefficient, and the current in the second resistor has a negative temperature coefficient. The temperature coefficient of the total current flowing between the first and second terminals is adjusted by adjusting the ratio between the first and second resistors.
摘要翻译：两端温度补偿电流源包括其发射极连接到第一端子的第一晶体管，其基极连接到第二晶体管的基极，并且其集电极耦合到电流镜。第二晶体管的发射极通过第一电阻器耦合到第一端子，并且其集电极耦合到电流镜。第二电阻器耦合在第一晶体管的第一端子和基极之间。电流镜耦合在第二端子和第一和第二晶体管的集电极之间，使得从第二端子提供给电流镜的所有电流流入第一和第二晶体管的集电极。第三晶体管的基极耦合到第一晶体管的集电极，其发射极耦合到第一晶体管的基极，其集电极耦合到第二晶体管。第一电阻器中的电流具有正温度系数，并且第二电阻器中的电流具有负温度系数。通过调整第一和第二电阻器之间的比例来调节在第一和第二端子之间流动的总电流的温度系数。

3. 发明授权

US4636916A Apparatus for minimizing optically and thermally induced noise in precision electronic components 失效
标题翻译：用于最小化精密电子部件中的光学和热感应噪声的装置
公开(公告)号：US4636916A
公开(公告)日：1987-01-13
申请号：US738530
申请日：1985-05-24
申请人： Rodney T. Burt , Robert M. Stitt
发明人： Rodney T. Burt , Robert M. Stitt
IPC分类号： H01L23/40 , H05K7/20
CPC分类号： H05K7/20 , H01L23/4093 , H01L2924/0002
摘要： Method and apparatus for minimizing unpredictable sources of noise, or error voltages, at the microvolt level in precision analog components such as operational amplifiers is described. Sources of such error voltages are temperature gradients across the dice of the precision components enclosed in a hermetically sealed package, thermoelectric voltages caused by temperature differences between junctions of leads of the package with other metals, and light reflected from the substrate through the glass seals around the leads in the base of such packages. A skirted heat sink is positioned in thermal contact with the sides of the package which package is mounted on a substrate. The heat sink transfers heat from the heat sink to its ambient environment by radiation and convection to maintain the temperature within the package substantially constant. The skirt depending from the heat sink encloses the space between the base of the package and the surface of the substrate to form a substantially isothermal enclosure to maintain the temperature of the leads of the package substantially constant. The depending skirt also blocks, or absorbs, radiation from the ambient environment of the package which prevents such radiation from being transmitted through the seals of the package to minimize the production of photoelectric induced error voltages induced in photosensitive circuits of the component.
摘要翻译：描述了用于在诸如运算放大器的精密模拟组件中最小化不可预测的噪声源或误差电压的方法和装置。这种误差电压的来源是封装在密封封装中的精密部件的芯片上的温度梯度，由包装与其他金属的引线的接头之间的温度差引起的热电压以及从基板通过玻璃密封件反射的光在这些包装的基础上的引线。一个裙带式散热器定位成与包装安装在基板上的封装的侧面热接触。散热器通过辐射和对流将热量从散热器传递到周围环境，以保持封装内的温度基本上恒定。从散热器悬挂的裙子封装在包装的基部和基板的表面之间的空间，以形成基本上等温的外壳，以保持包装的引线的温度基本恒定。悬垂的裙部还阻挡或吸收来自包装的周围环境的辐射，防止这种辐射透过包装的密封件，以最小化在部件的光敏电路中感应的光电感应误差电压的产生。

4. 发明授权

US4616188A Hall effect isolation amplifier 失效
标题翻译：霍尔效应隔离放大器
公开(公告)号：US4616188A
公开(公告)日：1986-10-07
申请号：US746860
申请日：1985-06-20
申请人： Robert M. Stitt , Rodney T. Burt
发明人： Robert M. Stitt , Rodney T. Burt
IPC分类号： H03F3/06 , H03F3/34 , H03F15/00 , G01R33/00
CPC分类号： H03F15/00
摘要： An isolation amplifier circuit is described that utilizes a magnetic field in combination with a Hall effect device to isolate input signals and output signals. The input signal is applied to a conducting coil that produces a magnetic field in a Hall effect material through which current is flowing. Because of the Hall effect, terminals on the sides of the Hall effect material can provide a voltage difference. This voltage difference is amplified and applied to a second conducting coil. The second conducting coil is adapted to provide a magnetic field in the opposite direction from the magnetic field produced by the input signal. When the magnetic fields are identical, no difference in current flowing through the two terminals will be present. The output signal of the difference amplifier circuit will be a function of the input signal. According to a second embodiment, apparatus is included for cancelling ambient magnetic fields. A second isolation amplifier circuit is arranged to have a spatial orientation rotated 180.degree. from a first isolation amplifier. With this configuration, ambient magnetic fields will have cancelling effects. The Hall effect device can be implemented in a PNP transistor with a split collector. The isolation amplifier can be fabricated with monolithic technology.
摘要翻译：描述了利用与霍尔效应装置组合的磁场来隔离输入信号和输出信号的隔离放大器电路。输入信号被施加到在电流流过的霍尔效应材料中产生磁场的导电线圈。由于霍尔效应，霍尔效应材料侧面的端子可以提供电压差。该电压差被放大并施加到第二导电线圈。第二导线线圈适于在与由输入信号产生的磁场相反的方向上提供磁场。当磁场相同时，不存在流过两个端子的电流的差异。差分放大器电路的输出信号将是输入信号的函数。根据第二实施例，包括用于消除环境磁场的装置。第二隔离放大器电路布置成具有从第一隔离放大器旋转180°的空间取向。通过这种配置，环境磁场将具有消除效果。霍尔效应器件可以在具有分离集电极的PNP晶体管中实现。隔离放大器可以用单片技术制造。

5. 发明授权

US07425848B2 Integrated driver circuit structure 有权
标题翻译：集成驱动电路结构
公开(公告)号：US07425848B2
公开(公告)日：2008-09-16
申请号：US11383413
申请日：2006-05-15
申请人： Viola Schaffer , Rodney T. Burt , Jürgen Metzger
发明人： Viola Schaffer , Rodney T. Burt , Jürgen Metzger
IPC分类号： H03B1/00
CPC分类号： H03K19/017581
摘要： An integrated circuit driver structure, comprising an amplifier, a current mirror block and an external current set resistor, is provided that is digitally configurable to operate in a current output mode or in a voltage output mode with its output level controlled by an external voltage. The current mirror block comprises multiple current sources, all having the same gate bias supplied by the output of amplifier. At any time, at least one current source is connected to supply the reference current to resistor, while all other current sources are connected to mirror the reference current to the load current output towards the load. A current gain ratio is based on the number of current sources connected to supply resistor and the number connected to mirror the reference current.
摘要翻译：提供了一种集成电路驱动器结构，其包括放大器，电流镜块和外部电流设置电阻器，其可数字配置以在电流输出模式或电压输出模式下工作，其输出电平由外部电压控制。电流镜块包括多个电流源，全部具有由放大器的输出提供的相同的栅极偏置。在任何时候，连接至少一个电流源以将参考电流提供给电阻器，而所有其他电流源连接到反向负载电流输出的参考电流。电流增益比基于连接到电源电阻的电流源的数量和连接到镜像参考电流的数量。

6. 发明授权

US5767538A Integrated photodiode/transimpedance amplifier 失效
标题翻译：集成光电二极管/跨阻放大器
公开(公告)号：US5767538A
公开(公告)日：1998-06-16
申请号：US728347
申请日：1996-10-09
申请人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
发明人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
IPC分类号： H03F1/08 , H03F3/08 , H01L29/74 , H01L27/148 , H01L29/768 , H01L31/111
CPC分类号： H03F1/08 , H03F3/08
摘要： An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors. In one embodiment, a feedback network includes a resistor connected between the output of a buffer driven by the transimpedance amplifier and an inverting input thereof, and a capacitor connected between the output and inverting input of the transimpedance amplifier to provide low noise, fast settling operation.
摘要翻译：集成电路光电检测器包括跨阻抗放大器，其包括具有PNP发射极耦合晶体管的差分放大器级和仅由发射极耦合晶体管的基极电流偏置的PNP输入晶体管，以实现低输入偏置电流。分别通过耦合在输入晶体管的基极和发射极之间的旁路电容来实现低噪声操作。恒流源提供电流，该电流在电阻器两端产生小的基座电压，以偏置跨阻放大器的非反相输入，以避免低电平光信号的非线性放大。正偏置N型保护桶围绕形成在P基板上的结隔离N区域中的光电检测器，以通过深穿透IR光收集在衬底中产生的电子，以防止它们引起放大误差。在一个实施例中，反馈网络包括连接在由跨阻抗放大器驱动的缓冲器的输出与其反相输入之间的电阻器，以及连接在跨阻放大器的输出和反相输入端之间以提供低噪声，快速稳定操作。

7. 发明授权

US5091657A High speed multiplex switch circuit and method 失效
标题翻译：高速多路开关电路及方法
公开(公告)号：US5091657A
公开(公告)日：1992-02-25
申请号：US671342
申请日：1991-03-19
申请人： Rodney T. Burt
发明人： Rodney T. Burt
IPC分类号： H01L21/8234 , H01L27/088 , H03K17/0412 , H03K17/567 , H03K17/687
CPC分类号： H03K17/04123
摘要： A high speed, high current analog switching circuit includes a switch JFET having its drain electrode connected to an analog input voltage terminal and a source electrode connected to an analog output voltage terminal. The gate electrode of the JFET switch is connected to switching control circuitry. The analog switching circuit includes circuitry that prevents the source-gate PN junction of the switch JFET from ever being forward biased more than approximately 0.2 volts. This prevents the charge storage capacitance of that PN junction from ever increasing to such high values (e.g. 100 to 1000 picofarads) that discharging of the charge storage capacitance through the channel resistance of the switch JFET takes excessively long periods of time. Rapid equalization of the analog output voltage and analog input voltage to within approximately 10 microvolts of each other is thereby achieved.
摘要翻译：高速大电流模拟开关电路包括开关JFET，其漏极连接到模拟输入电压端子，源电极连接到模拟输出电压端子。 JFET开关的栅电极连接到开关控制电路。模拟开关电路包括防止开关JFET的源极 - PN PN结的正向偏压大于约0.2伏的电路。这防止了PN结的电荷存储电容不断增加到通过开关JFET的沟道电阻对电荷存储电容进行放电所需的时间过长的高值（例如100至1000皮法）。从而实现了将模拟输出电压和模拟输入电压的快速均衡彼此在大约10微伏之内。

8. 发明授权

US08072262B1 Low input bias current chopping switch circuit and method 有权
标题翻译：低输入偏置电流斩波开关电路及方法
公开(公告)号：US08072262B1
公开(公告)日：2011-12-06
申请号：US12803468
申请日：2010-06-28
申请人： Rodney T. Burt , Joy Y. Zhang
发明人： Rodney T. Burt , Joy Y. Zhang
IPC分类号： H03F1/02
CPC分类号： H03F3/005 , H03F3/38 , H03F2200/271
摘要： A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a second frequency substantially greater than the first frequency to produce a second signal. The first frequency is a sub-harmonic of the second frequency. Post-chopping circuitry (30) chops the second chopped signal at the first frequency to produce a third signal that is applied to an input of a signal conditioning circuit (2). The output chopping circuitry (10) chops an output of the signal conditioning circuit at the second frequency to generate a fourth signal. The fourth signal is filtered.
摘要翻译：斩波稳定电路（1）包括用于以第一频率斩波输入信号（Vin）的预斩波电路（26）以产生第一信号。输入斩波电路（9）以基本上大于第一频率的第二频率斩波第一信号以产生第二信号。第一频率是第二频率的次谐波。斩波电路（30）以第一频率切断第二斩波信号以产生施加到信号调理电路（2）的输入的第三信号。输出斩波电路（10）以第二频率斩波信号调理电路的输出，以产生第四信号。第四个信号被滤波。

9. 发明授权

US06854076B2 Method and apparatus for calibration of an electronic device 有权
标题翻译：电子设备校准方法和装置
公开(公告)号：US06854076B2
公开(公告)日：2005-02-08
申请号：US09826405
申请日：2001-04-03
申请人： Rodney T. Burt , R. Mark Stitt
发明人： Rodney T. Burt , R. Mark Stitt
IPC分类号： H03F3/45 , G11B5/00
CPC分类号： H03F3/45973 , H03F3/45941 , H03F2200/261 , H03F2203/45538
摘要： A method and apparatus for auto-calibrating an electronic device without interrupting normal operation of the device. An electronic device configured as a high voltage difference amplifier is disclosed having a calibration circuit which couples a calibration excitation signal to a common-mode signal path of the difference amplifier. The difference amplifier includes a variable transfer function circuit which may be used to adjust the common-mode rejection of the difference amplifier. The calibration excitation signal may be a random, pseudo-random, out-of-band, or other frequency shaped signal generated in reference to a clock signal. A calibration error signal is detected from an output signal. The variable transfer function circuit can be adjusted in response to the detected error signal to reduce the calibration error signal. As a result, common-mode rejection errors of the difference amplifier may be reduced while the difference amplifier is coupled to an input signal source.
摘要翻译：一种用于在不中断设备的正常操作的情况下自动校准电子设备的方法和装置。公开了一种配置为高压差分放大器的电子设备，其具有将校准激励信号耦合到差分放大器的共模信号路径的校准电路。差分放大器包括可用于调节差分放大器的共模抑制的可变传递函数电路。校准激励信号可以是参考时钟信号产生的随机，伪随机，带外或其他频率信号。从输出信号检测校准误差信号。可以根据检测到的误差信号调整可变传递函数电路，以减少校准误差信号。结果，差分放大器的共模抑制误差可以减小，而差分放大器耦合到输入信号源。

10. 发明授权

US4940981A Dual analog-to-digital converter with single successive approximation register 失效
标题翻译：具有单个逐次逼近寄存器的双模数转换器
公开(公告)号：US4940981A
公开(公告)日：1990-07-10
申请号：US308150
申请日：1989-02-08
申请人： Jimmy R. Naylor , Rodney T. Burt , Tony D. Miller
发明人： Jimmy R. Naylor , Rodney T. Burt , Tony D. Miller
IPC分类号： H03F3/45 , H03K5/08 , H03K5/24 , H03M1/06 , H03M1/12 , H03M1/38 , H03M1/46
CPC分类号： H03M1/0607 , H03F3/45188 , H03K5/2481 , H03M1/123 , H03F2203/45456 , H03F2203/45462 , H03F2203/45508 , H03F2203/45652 , H03F2203/45702 , H03M1/468
摘要： A dual successive approximation analog-to-digital converter, including circuitry for generating separate reference voltages for each analog-to-digital converter, is integrated onto a single semiconductor chip. A single successive approximation register including a 19 bit shift register and two 18 bit latches and associated gating circuitry operates to produce two sets of 18 successive approximation numbers, one supplied as successive digital inputs to a CDAC of one of the analog-to-digital converters and the other set of successive approximation numbers being applied as digital inputs to a CDAC of the other analog-to-digital converter. A CMOS comparator includes two high speed, low gain differential amplifier stages, the first including cascode MOSFETs to provide a high power supply rejection. A pair of auto-zeroing capacitors and a pair of auto-zeroing MOSFETs operate on the outputs of the second differential amplifier to reduce input offset voltage, achieving high speed, low noise operation in a small amount of semiconductor chip area. The auto-zeroed output is supplied to the input of a two stage differential amplifier, the outputs of which also are auto-zeroed and applied to a differential CMOS latch, thereby providing a high speed, low noise, low offset CMOS comparator.
摘要翻译：包括用于为每个模数转换器产生单独参考电压的电路的双逐次逼近模数转换器被集成到单个半导体芯片上。包括19位移位寄存器和两个18位锁存器和相关门控电路的单个逐次逼近寄存器操作以产生两组18个逐次逼近数字，一组作为连续的数字输入提供给模数转换器之一的CDAC 并且另一组逐次逼近数字被用作数字输入到另一模数转换器的CDAC。 CMOS比较器包括两个高速，低增益差分放大器级，第一个包括共源共栅MOSFET，以提供高电源抑制。一对自动归零电容器和一对自动归零MOSFET在第二差分放大器的输出上工作，以减少输入失调电压，实现少量半导体芯片面积的高速度，低噪声运行。自动归零输出被提供给两级差分放大器的输入，它们的输出也被自动归零并应用于差分CMOS锁存器，从而提供高速，低噪声，低失调的CMOS比较器。

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