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    • 2. 发明申请
    • ARITHMETIC CIRCUIT, ARITHMETIC PROCESSING APPARATUS AND METHOD OF CONTROLLING ARITHMETIC CIRCUIT
    • 算术电路,算术处理装置和控制算术电路的方法
    • US20120259905A1
    • 2012-10-11
    • US13437969
    • 2012-04-03
    • Ryuji KANHideyuki UNNOKenichi Kitamura
    • Ryuji KANHideyuki UNNOKenichi Kitamura
    • G06F7/42
    • G06F7/49942G06F7/483
    • An arithmetic circuit for quantizing pre-quantized data includes a first input register to store first-format pre-quantized data that includes a mantissa and an exponent, a second input register to store a quantization target exponent, an exponent-correction-value indicating unit to indicate an exponent correction value, an exponent generating unit to generate a quantized exponent obtained by subtracting the exponent correction value from the quantization target exponent, a shift amount generating unit to generate a shift amount obtained by subtracting the exponent of the pre-quantized data and the exponent correction value from the quantization target exponent, a shift unit to generate a quantized mantissa obtained by shifting the mantissa of the pre-quantized data by the shift amount generated by the shift amount generating unit, and an output register to store quantized data that includes the quantized exponent generated by the exponent generating unit and the quantized mantissa generated by the shift unit.
    • 用于量化预量化数据的算术电路包括:第一输入寄存器,用于存储包括尾数和指数的第一格式的预量化数据;存储量化目标指数的第二输入寄存器;指数校正值指示单元 指示指数校正值,指数生成单元,用于生成通过从量化目标指数中减去指数校正值而获得的量化指数;移位量生成单元,生成通过减去预量化数据的指数得到的移位量 以及来自量化目标指数的指数校正值,用于生成通过将预量化数据的尾数移位由移位量产生单元生成的移位量而获得的量化尾数的移位单元和存储量化数据的输出寄存器 其包括由指数生成单元生成的量化指数和量化的尾数gen 由换档单元擦除。
    • 3. 发明申请
    • ARITHMETIC CIRCUIT, ARITHMETIC PROCESSING APPARATUS AND METHOD OF CONTROLLING ARITHMETIC CIRCUIT
    • 算术电路,算术处理装置和控制算术电路的方法
    • US20120259903A1
    • 2012-10-11
    • US13439932
    • 2012-04-05
    • Ryuji KANHideyuki UnnoKenichi Kitamura
    • Ryuji KANHideyuki UnnoKenichi Kitamura
    • G06F7/38
    • G06F7/49947G06F7/49957
    • An arithmetic circuit for rounding pre-rounded data includes a first register to store first-format pre-rounded data that includes a mantissa of a fixed-precision floating-point number using a base-N numbering system, and includes an exponent for the mantissa, a second register to store rounding precision data indicative of precision for rounding the pre-rounded data, a leading zero counting unit to count consecutive zeros starting from a most significant bit of the mantissa stored in the first register, an exponent generating unit to generate a post-round exponent indicative of an exponent for a rounded significant by subtracting the number of zeros counted by the leading zero counting unit and the rounding precision data from a sum of one and the exponent stored in the first register, and an output register to store the post-round exponent and a rounding-add value that is to be added to a digit at which rounding is performed.
    • 用于舍入前置数据的算术电路包括:第一寄存器,用于存储使用基本N编号系统的包括固定精度浮点数的尾数的第一格式的前置数据,并且包括用于尾数的指数 第二寄存器,用于存储指示用于舍入预舍数据的精度的舍入精度数据;前导零计数单元,用于从存储在第一寄存器中的尾数的最高有效位开始计数连续零;指数生成单元,用于生成 指示通过从前导零计数单元计数的零的数目和来自存储在第一寄存器中的一个和的指数的舍入精度数据的舍入精度数据来指示舍入有效的指数的后向指数,以及输出寄存器 存储后轮指数和要添加到执行舍入的数字的舍入加法值。
    • 4. 发明授权
    • Arithmetic circuit, arithmetic processing apparatus and method of controlling arithmetic circuit
    • 算术电路,运算处理装置及运算电路的控制方法
    • US08903881B2
    • 2014-12-02
    • US13437969
    • 2012-04-03
    • Ryuji KanHideyuki UnnoKenichi Kitamura
    • Ryuji KanHideyuki UnnoKenichi Kitamura
    • G06F7/42G06F7/483G06F7/499
    • G06F7/49942G06F7/483
    • An arithmetic circuit for quantizing pre-quantized data includes a first input register to store first-format pre-quantized data that includes a mantissa and an exponent, a second input register to store a quantization target exponent, an exponent-correction-value indicating unit to indicate an exponent correction value, an exponent generating unit to generate a quantized exponent obtained by subtracting the exponent correction value from the quantization target exponent, a shift amount generating unit to generate a shift amount obtained by subtracting the exponent of the pre-quantized data and the exponent correction value from the quantization target exponent, a shift unit to generate a quantized mantissa obtained by shifting the mantissa of the pre-quantized data by the shift amount generated by the shift amount generating unit, and an output register to store quantized data that includes the quantized exponent generated by the exponent generating unit and the quantized mantissa generated by the shift unit.
    • 用于量化预量化数据的算术电路包括:第一输入寄存器,用于存储包括尾数和指数的第一格式的预量化数据;存储量化目标指数的第二输入寄存器;指数校正值指示单元 指示指数校正值,指数生成单元,用于生成通过从量化目标指数中减去指数校正值而获得的量化指数;移位量生成单元,生成通过减去预量化数据的指数得到的移位量 以及来自量化目标指数的指数校正值,用于生成通过将预量化数据的尾数偏移由移位量产生单元生成的移位量而获得的量化尾数的移位单元和用于存储量化数据的输出寄存器 其包括由指数生成单元生成的量化指数和量化的尾数gen 由换档单元擦除。
    • 7. 发明授权
    • Liquid ejecting apparatus
    • 液体喷射装置
    • US08322837B2
    • 2012-12-04
    • US13045122
    • 2011-03-10
    • Kenichi Kitamura
    • Kenichi Kitamura
    • B41J2/18B41J2/235
    • B41J2/175B41J2/17596B41J2/18
    • A liquid ejecting apparatus comprising: a liquid reservoir unit, a liquid ejection head, a supply channel, a collecting channel; and a first pressure applied to the downstream side of the valve member in the circulation channel by the suction pump is larger than a second pressure on the downstream side of the valve member in the circulation channel required for causing the film to act so that the valve member opens the circulation channel, and a sum of a waterhead pressure determined by the height from the liquid reservoir unit to the circulation channel opened and closed by the valve member provided in each of the circulation channel and the first pressure is smaller than the second pressure.
    • 一种液体喷射装置,包括:液体储存单元,液体喷射头,供应通道,收集通道; 并且通过抽吸泵施加到循环通道中的阀构件的下游侧的第一压力大于在使得膜起作用所需的循环通道中的阀构件的下游侧上的第二压力,使得阀 构件打开循环通道,并且由设置在每个循环通道和第一压力中的阀构件打开和关闭的从储液单元到循环通道的高度确定的水头压力之和小于第二压力 。
    • 8. 发明申请
    • PROCESSOR, CONTROL METHOD OF PROCESSOR, AND COMPUTER READABLE STORAGE MEDIUM STORING PROCESSING PROGRAM
    • 处理器,处理器的控制方法和计算机可读存储介质存储处理程序
    • US20110022646A1
    • 2011-01-27
    • US12836061
    • 2010-07-14
    • Kenichi KitamuraShiro Kamoshida
    • Kenichi KitamuraShiro Kamoshida
    • G06F7/44G06F5/01
    • G06F7/535
    • A processor for dividing by calculating repeatedly an n-bit width partial quotient includes, a dividend zero count value counter that counts a dividend zero count value, a divisor zero count value counter that counts a divisor zero count value, a correction value calculator that calculates a correction value to a loop count value, a correction loop count value calculator that calculates a correction loop count value, a dividend shift unit that shifts leftward an absolute value of the dividend by the dividend zero count value and shifts rightward the leftward-shifted absolute value of the dividend by the correction value, a divisor shift unit that shifts leftward an absolute value of the divisor by the divisor zero count value, and a division loop operation unit that divides based on an output value from the dividend shift unit, an output value from the divisor shift unit, and the correction loop count value.
    • 用于通过重复计算n位宽度部分商进行除法的处理器包括计数除数零计数值的除数零计数值计数器,对除数零计数值进行计数的除数零计数值计数器,计算除数零计数值的校正值计算器 循环计数值的校正值,计算校正循环计数值的校正循环计数值计算器,向左移动除数的绝对值乘以除数零计数值并向左移动左移绝对值的除数移位单位 除数值除以校正值,除数移位单位,其将除数的绝对值除以除数零计数值的除数移位单位,以及除法运算单元,其根据来自分红移位单位的输出值进行分割,输出 来自除数移位单元的值,以及校正循环计数值。