专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08916848B2 Resistance change device and memory cell array 有权
标题翻译：电阻变化器和存储单元阵列
公开(公告)号：US08916848B2
公开(公告)日：2014-12-23
申请号：US13598305
申请日：2012-08-29
申请人： Shosuke Fujii , Daisuke Matsushita , Yuichiro Mitani
发明人： Shosuke Fujii , Daisuke Matsushita , Yuichiro Mitani
IPC分类号： H01L47/00 , H01L45/00 , H01L27/24 , G11C13/00
CPC分类号： H01L45/08 , G11C13/0007 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/145
摘要： According to one embodiment, a resistance change device includes a first electrode including a metal, a second electrode, and an amorphous oxide layer including Si and O between the first and second electrode, the layer having a concentration gradient of O and a first peak thereof in a direction from the first electrode to the second electrode.
摘要翻译：根据一个实施例，电阻改变装置包括在第一和第二电极之间包括金属，第二电极和包括Si和O的无定形氧化物层的第一电极，具有浓度梯度为O的层和其第一峰值在从第一电极到第二电极的方向上。

2. 发明授权

US09040949B2 Information recording device and method of manufacturing the same 有权
标题翻译：信息记录装置及其制造方法
公开(公告)号：US09040949B2
公开(公告)日：2015-05-26
申请号：US13051636
申请日：2011-03-18
申请人： Yuichiro Mitani , Daisuke Matsushita , Shosuke Fujii
发明人： Yuichiro Mitani , Daisuke Matsushita , Shosuke Fujii
IPC分类号： H01L45/00 , G11C11/56 , H01L27/24
CPC分类号： H01L45/1641 , G11C11/56 , G11C11/5614 , G11C11/5664 , G11C11/5685 , G11C2213/33 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233
摘要： According to one embodiment, an information recording device includes first and second electrodes, a variable resistance layer between the first and second electrodes, and a control circuit which controls the variable resistance layer to n (n is a natural number except 1) kinds of resistance. The variable resistance layer comprises a material filled between the first and second electrodes, and particles arranged in a first direction from the first electrode to the second electrode in the material, and each of the particles has a resistance lower than that of the material. A resistance of the variable resistance layer is decided by a short between the first electrode and at least one of the particles.
摘要翻译：根据一个实施例，信息记录装置包括第一和第二电极，第一和第二电极之间的可变电阻层，以及将可变电阻层控制为n（n是除了1之外的自然数）的控制电路，。可变电阻层包括填充在第一和第二电极之间的材料，以及在材料中从第一电极到第二电极的第一方向排列的颗粒，并且每个颗粒的电阻都低于材料的电阻。可变电阻层的电阻由第一电极和至少一个颗粒之间的短路决定。

3. 发明申请

US20120319074A1 RESISTANCE CHANGE DEVICE AND MEMORY CELL ARRAY 有权
标题翻译：电阻变化器件和存储器单元阵列
公开(公告)号：US20120319074A1
公开(公告)日：2012-12-20
申请号：US13598305
申请日：2012-08-29
申请人： Shosuke FUJII , Daisuke Matsushita , Yuichiro Mitani
发明人： Shosuke FUJII , Daisuke Matsushita , Yuichiro Mitani
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , G11C13/0007 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/145
摘要： According to one embodiment, a resistance change device includes a first electrode including a metal, a second electrode, and an amorphous oxide layer including Si and O between the first and second electrode, the layer having a concentration gradient of O and a first peak thereof in a direction from the first electrode to the second electrode.
摘要翻译：根据一个实施例，电阻改变装置包括在第一和第二电极之间包括金属，第二电极和包括Si和O的无定形氧化物层的第一电极，具有浓度梯度为O的层和其第一峰值在从第一电极到第二电极的方向上。

4. 发明申请

US20120261742A1 NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20120261742A1
公开(公告)日：2012-10-18
申请号：US13457054
申请日：2012-04-26
申请人： Izumi Hirano , Shosuke Fujii , Yuichiro Mitani , Naoki Yasuda
发明人： Izumi Hirano , Shosuke Fujii , Yuichiro Mitani , Naoki Yasuda
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/4234 , H01L29/513
摘要： A nonvolatile semiconductor memory apparatus according to an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer, the first insulating film being a single-layer film containing silicon oxide or silicon oxynitride; a charge trapping film formed on the first insulating film; a second insulating film formed on the charge trapping film; and a control gate electrode formed on the second insulating film. A metal oxide exists in an interface between the first insulating film and the charge trapping film, the metal oxide comprises material which is selected from the group of Al2O3, HfO2, ZrO2, TiO2, and MgO, the material is stoichiometric composition, and the charge trapping film includes material different from the material of the metal oxide.
摘要翻译：根据实施例的非易失性半导体存储装置包括：半导体层; 形成在所述半导体层上的第一绝缘膜，所述第一绝缘膜是含有氧化硅或氮氧化硅的单层膜; 形成在第一绝缘膜上的电荷捕获膜; 形成在电荷捕获膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。金属氧化物存在于第一绝缘膜和电荷捕获膜之间的界面中，金属氧化物包括选自Al 2 O 3，HfO 2，ZrO 2，TiO 2和MgO的材料，该材料为化学计量组成，并且电荷捕获膜包括与金属氧化物的材料不同的材料。

5. 发明授权

US08698313B2 Nonvolatile semiconductor memory apparatus 有权
标题翻译：非易失性半导体存储装置
公开(公告)号：US08698313B2
公开(公告)日：2014-04-15
申请号：US13457054
申请日：2012-04-26
申请人： Izumi Hirano , Shosuke Fujii , Yuichiro Mitani , Naoki Yasuda
发明人： Izumi Hirano , Shosuke Fujii , Yuichiro Mitani , Naoki Yasuda
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/4234 , H01L29/513
摘要： A nonvolatile semiconductor memory apparatus according to an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer, the first insulating film being a single-layer film containing silicon oxide or silicon oxynitride; a charge trapping film formed on the first insulating film; a second insulating film formed on the charge trapping film; and a control gate electrode formed on the second insulating film. A metal oxide exists in an interface between the first insulating film and the charge trapping film, the metal oxide comprises material which is selected from the group of Al2O3, HfO2, ZrO2, TiO2, and MgO, the material is stoichiometric composition, and the charge trapping film includes material different from the material of the metal oxide.
摘要翻译：根据实施例的非易失性半导体存储装置包括：半导体层; 形成在所述半导体层上的第一绝缘膜，所述第一绝缘膜是含有氧化硅或氮氧化硅的单层膜; 形成在第一绝缘膜上的电荷捕获膜; 形成在电荷捕获膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。金属氧化物存在于第一绝缘膜和电荷捕获膜之间的界面中，金属氧化物包括选自Al 2 O 3，HfO 2，ZrO 2，TiO 2和MgO的材料，该材料为化学计量组成，并且电荷捕获膜包括与金属氧化物的材料不同的材料。

6. 发明授权

US08592892B2 Nonvolatile semiconductor memory device and method for manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08592892B2
公开(公告)日：2013-11-26
申请号：US11898603
申请日：2007-09-13
申请人： Yuichiro Mitani , Masahiro Koike , Yasushi Nakasaki , Daisuke Matsushita
发明人： Yuichiro Mitani , Masahiro Koike , Yasushi Nakasaki , Daisuke Matsushita
IPC分类号： H01L29/66
CPC分类号： H01L29/7881 , H01L21/28273 , H01L21/28282 , H01L29/42324 , H01L29/513 , H01L29/792
摘要： A nonvolatile semiconductor memory device includes: a memory element, the memory element including: a semiconductor substrate; a first insulating film formed on a region in the semiconductor substrate located between a source region and a drain region, and having a stack structure formed with a first insulating layer, a second insulating layer, and a third insulating layer in this order, the first insulating layer including an electron trapping site, the second insulating layer not including the electron trapping site, and the third insulating layer including the electron trapping site, and the electron trapping site being located in a position lower than conduction band minimum of the first through third insulating layers while being located in a position higher than conduction band minimum of a material forming the semiconductor substrate; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.
摘要翻译：非易失性半导体存储器件包括：存储元件，所述存储元件包括：半导体衬底; 第一绝缘膜，形成在位于源区和漏区之间的半导体衬底的区域上，并且具有依次形成有第一绝缘层，第二绝缘层和第三绝缘层的堆叠结构，第一绝缘膜包含电子俘获位置的绝缘层，不包含电子俘获位置的第二绝缘层和包含电子捕获位点的第三绝缘层，并且电子捕获位点位于低于第一至第三区域的导带最小值的位置绝缘层位于高于形成半导体衬底的材料的导带最小值的位置; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。

7. 发明授权

US08426302B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08426302B2
公开(公告)日：2013-04-23
申请号：US13370532
申请日：2012-02-10
申请人： Daisuke Matsushita , Koichi Kato , Yuichiro Mitani
发明人： Daisuke Matsushita , Koichi Kato , Yuichiro Mitani
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L29/7926 , G11C16/0466 , H01L21/02164 , H01L21/02238 , H01L21/02312 , H01L21/28282 , H01L21/32105 , H01L27/11582 , H01L29/4908 , H01L29/66765 , H01L29/78678
摘要： A method of manufacturing a semiconductor device according to an embodiment, includes: forming a stack structure by alternately stacking control gate electrodes and interlayer insulating films; forming a through-hole that penetrates through the stack structure in a stacking direction of the control gate electrodes and the interlayer insulating films; forming a first insulating film that covers an inner surface of the through-hole; forming a charge storage layer that covers an inner surface of the first insulating film; forming a second insulating film that covers an inner surface of the charge storage layer; forming a semiconductor layer that covers an inner surface of the second insulating film; and oxidizing an interface between the semiconductor layer and the second insulating film by performing a heat treatment in an atmosphere containing O2 gas at a temperature of 600° C. or lower.
摘要翻译：根据实施例的制造半导体器件的方法包括：通过交替堆叠控制栅电极和层间绝缘膜形成堆叠结构; 在所述控制栅电极和所述层间绝缘膜的堆叠方向上形成穿过所述堆叠结构的通孔; 形成覆盖所述通孔的内表面的第一绝缘膜; 形成覆盖所述第一绝缘膜的内表面的电荷存储层; 形成覆盖所述电荷存储层的内表面的第二绝缘膜; 形成覆盖所述第二绝缘膜的内表面的半导体层; 在600℃以下的温度下，在含有O 2气体的气氛中进行热处理，氧化半导体层与第二绝缘膜的界面。

8. 发明申请

US20110003481A1 Method for manufacturing a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US20110003481A1
公开(公告)日：2011-01-06
申请号：US12801912
申请日：2010-07-01
申请人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
发明人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
IPC分类号： H01L21/314
CPC分类号： H01L27/11568 , C23C8/02 , C23C8/24 , C23C8/80 , H01L21/2652 , H01L21/28202 , H01L21/28238 , H01L21/28273 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L27/115 , H01L27/11521 , H01L29/105 , H01L29/513
摘要： It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.
摘要翻译：可以抑制成膜时的缺陷的产生。一种制造半导体器件的方法，包括：将半导体衬底放置在大气中，从而在所述半导体衬底的表面上形成氮化物膜，所述气氛包含氮化所述半导体衬底的表面的第一氮化气体和第一稀释气体实际上不与半导体衬底反应，第一稀释气体的分压和第一氮化气体的分压与第一氮化气体的分压之和的比率为5以上，气氛为40乇或更低。

9. 发明授权

US07749919B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07749919B2
公开(公告)日：2010-07-06
申请号：US11896860
申请日：2007-09-06
申请人： Kiwamu Sakuma , Daisuke Matsushita , Koichi Kato , Yasushi Nakasaki , Izumi Hirano , Kouichi Muraoka , Yuichiro Mitani , Shigeto Fukatsu , Toshihide Ito
发明人： Kiwamu Sakuma , Daisuke Matsushita , Koichi Kato , Yasushi Nakasaki , Izumi Hirano , Kouichi Muraoka , Yuichiro Mitani , Shigeto Fukatsu , Toshihide Ito
IPC分类号： H01L21/321
CPC分类号： H01L21/28273
摘要： A semiconductor device includes: a semiconductor substrate; a source region and a drain region formed at a distance from each other in the semiconductor substrate; a first insulating film formed on a portion of the semiconductor substrate, the portion being located between the source region and the drain region; a charge storage film formed on the first insulating film; a second insulating film formed above the charge storage film and made of a high-permittivity material; a control gate electrode formed above the second insulating film; and a silicon nitride layer including nitrogen atoms having three-coordinate nitrogen bonds, at least one of second-nearest neighbor atoms of the nitrogen atoms being a nitrogen atom. At least one of the charge storage film and the control gate electrode contains silicon, the silicon nitride layer is located between the second insulating film and the at least one of the charge storage film and the control gate electrode.
摘要翻译：半导体器件包括：半导体衬底; 在半导体衬底中形成为彼此间隔一定距离的源极区域和漏极区域; 形成在半导体衬底的一部分上的第一绝缘膜，该部分位于源区和漏区之间; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上方并由高介电常数材料制成的第二绝缘膜; 形成在所述第二绝缘膜上方的控制栅电极; 和包含具有三配位氮键的氮原子的氮化硅层，氮原子的第二最近邻原子中的至少一个为氮原子。电荷存储膜和控制栅电极中的至少一个包含硅，氮化硅层位于第二绝缘膜和电荷存储膜和控制栅电极中的至少一个之间。

10. 发明申请

US20120018792A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120018792A1
公开(公告)日：2012-01-26
申请号：US13146312
申请日：2010-01-21
申请人： Daisuke Matsushita , Ryuji Ohba , Yuichiro Mitani
发明人： Daisuke Matsushita , Ryuji Ohba , Yuichiro Mitani
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L27/11521 , G11C16/0466 , H01L27/11568 , H01L27/11578 , H01L27/11582 , H01L29/4234 , H01L29/792
摘要： A method of manufacturing a nonvolatile semiconductor memory device according to an embodiment, includes: forming a first insulating film on a semiconductor substrate; forming a charge trapping film on the first insulating film, the forming of the charge trapping film including; forming a first nitride layer on the first insulating film at a heat treatment temperature of 550° C. or higher, forming a first oxynitride layer on the first nitride layer by oxidizing a surface of the first nitride layer, and forming a second nitride layer on the first oxynitride layer; forming a second insulating film on the charge trapping film; and forming a control gate on the second insulating film.
摘要翻译：根据实施例的制造非易失性半导体存储器件的方法包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成电荷捕获膜，形成所述电荷俘获膜，包括：在550℃或更高的热处理温度下在第一绝缘膜上形成第一氮化物层，通过氧化第一氮化物层的表面，在第一氮化物层上形成第一氮氧化物层，并在第一氮化物层上形成第二氮化物层第一氧氮化物层; 在电荷捕获膜上形成第二绝缘膜; 以及在所述第二绝缘膜上形成控制栅极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式