专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20140191801A1 BICMOS GATE DRIVER FOR CLASS-S RADIO FREQUENCY POWER AMPLIFIER 有权
标题翻译： BICMOS门控级无线射频功率放大器
公开(公告)号：US20140191801A1
公开(公告)日：2014-07-10
申请号：US13736442
申请日：2013-01-08
申请人： LSI CORPORATION
发明人： Ross S. Wilson , Said E. Abdelli , Peter Kiss , Donald R. Laturell , Kameran Azadet , James F. MacDonald
IPC分类号： H03F3/217 , H03F3/193
CPC分类号： H03F3/2171 , H03F3/193 , H03F3/195 , H03F3/245 , H03F3/305 , H03F3/45179 , H03F3/45183 , H03F2200/78 , H03F2203/45394 , H03F2203/45456 , H03F2203/45631 , H03F2203/45702
摘要： The invention may be embodied in a resynchronizing, push-pull drive circuit for driving the gate electrodes of a digital Class-S Radio Frequency Power Amplifier (RF-PA). A binary bitstream received from a bitstream generator, such as a sigma-delta modulator, Viterbi-based optimal-bit-pattern modulator sigma-delta, or other suitable modulator, is resynchronized to a low-jitter master clock, then converted to fast-rise, high-swing complementary digital signals to drive the gates of the Class-S RF-PA. The drive circuit provides a high slew-rate, large-swing, quasi-digital gate drive circuit to drive the significant gate capacitance of the RF-PA with sufficient rise times. A combination of bipolar transistor current switches and cascoded CMOS devices is employed to attain requisite performance. For example, the driving circuit is well suited for use with Class-S RF-PAs used in wireless communication systems.
摘要翻译：本发明可以体现在用于驱动数字S类射频功率放大器（RF-PA）的栅电极的再同步推挽驱动电路中。从比特流发生器（例如，Σ-Δ调制器，基于维特比的最佳位模式调制器Σ-Δ或其它合适的调制器）接收的二进制比特流被重新同步到低抖动主时钟，上升，高挥发互补数字信号驱动S-S RF-PA的门。驱动电路提供高压摆率，大摆幅，准数字栅极驱动电路，以足够的上升时间驱动RF-PA的显着栅极电容。采用双极晶体管电流开关和级联CMOS器件的组合来实现必要的性能。例如，驱动电路非常适用于无线通信系统中使用的S类RF-PA。

2. 发明申请

US20110163809A1 PUSH-PULL OUTPUT CIRCUIT 有权
标题翻译：推拉输出电路
公开(公告)号：US20110163809A1
公开(公告)日：2011-07-07
申请号：US12887312
申请日：2010-09-21
申请人： Hiroyuki Tsurumi
发明人： Hiroyuki Tsurumi
IPC分类号： H03F3/45 , H03F1/22
CPC分类号： H03F3/3045 , H03F3/305 , H03F3/45183 , H03F2203/45674
摘要： According to one embodiment, a first transistor is connected between a first power supply rail and an output unit. A second transistor is connected between the output unit and a second power supply rail. A gm amplifier includes an input unit and first and second output terminals and amplifies a difference between a signal input to the input unit and a reference voltage. First and second current mirror circuits are connected to be vertically stacked between the first rail and the first terminal as well as a gate of the second transistor. Third and fourth current mirror circuits are connected to be vertically stacked between the second rail and the second terminal as well as a gate of the first transistor. The gate of the first transistor is connected to the first and second circuits. The gate of the second transistor is connected to the third and fourth circuits.
摘要翻译：根据一个实施例，第一晶体管连接在第一电源轨和输出单元之间。第二晶体管连接在输出单元和第二电源轨之间。 gm放大器包括输入单元和第一和第二输出端子，并放大输入到输入单元的信号与参考电压之间的差值。第一和第二电流镜电路被连接以垂直堆叠在第一轨道和第一端子之间以及第二晶体管的栅极。第三和第四电流镜电路被连接以垂直地堆叠在第二轨道和第二端子之间以及第一晶体管的栅极。第一晶体管的栅极连接到第一和第二电路。第二晶体管的栅极连接到第三和第四电路。

3. 发明申请

US20130147427A1 WIRELESS ELECTRIC FIELD POWER TRANSMISSION SYSTEM AND METHOD 有权
标题翻译：无线电力传输系统及方法
公开(公告)号：US20130147427A1
公开(公告)日：2013-06-13
申请号：US13607474
申请日：2012-09-07
申请人： Nagesh POLU , Md. Jahangir ALAM , Sheikh Mominul ISLAM , Nima SOLTANI
发明人： Nagesh POLU , Md. Jahangir ALAM , Sheikh Mominul ISLAM , Nima SOLTANI
IPC分类号： H02J17/00 , H02J7/00
CPC分类号： H02J50/12 , B60L11/182 , B60L11/1833 , B60L2210/10 , B60L2210/30 , B60L2210/40 , H01Q1/2225 , H01Q1/273 , H01Q1/3216 , H01Q7/08 , H02J7/0042 , H02J7/025 , H02J17/00 , H02J50/05 , H02J50/23 , H02J50/27 , H02J50/40 , H02J50/60 , H02J50/70 , H02J50/80 , H02J50/90 , H03F1/56 , H03F3/195 , H03F3/245 , H03F3/305 , H03F2200/09 , H03F2200/102 , H03F2200/387 , H03F2200/462 , H03F2203/30031 , H03F2203/30111 , H03F2203/30114 , H03J2200/06 , H03L7/0812 , H04B5/0037 , H04B5/0081 , Y02T10/7005 , Y02T10/7072 , Y02T10/7216 , Y02T10/7241 , Y02T10/90 , Y02T90/12 , Y02T90/121 , Y02T90/122 , Y02T90/125 , Y02T90/127 , Y02T90/14
摘要： A wireless electric field power transmission system comprises: a transmitter comprising a transmitter antenna, the transmitter antenna comprising at least two conductors defining a volume therebetween; and at least one receiver, wherein the transmitter antenna transfers power wirelessly via electric field coupling when the at least one receiver is within the volume.
摘要翻译：无线电场电力传输系统包括：发射机，包括发射机天线，所述发射机天线包括至少两个限定其间的体积的导体; 以及至少一个接收器，其中当所述至少一个接收器在所述体积内时，所述发射机天线通过电场耦合无线地传送功率。

4. 发明授权

US3968382A Protective circuit for field effect transistor amplifier 失效
标题翻译：场效应晶体管放大器的保护电路
公开(公告)号：US3968382A
公开(公告)日：1976-07-06
申请号：US512257
申请日：1974-10-04
申请人： Katsuaki Tsurushima
发明人： Katsuaki Tsurushima
IPC分类号： G01H1/04 , G01V1/16 , H03F1/42 , H03F1/52 , H03F3/30 , H02H9/04 , H02H7/20 , H03F3/16 , H03F3/185
CPC分类号： G01H1/04 , G01V1/16 , H03F1/52 , H03F1/523 , H03F3/305 , H03F2200/516
摘要： A field effect transistor amplifier comprising one or more depletion-type field effect transistors, preferably with triode characteristics, and having an operating voltage applied across its drain and source electrodes through a load, while an input signal to be amplified is applied to its gate electrode and a predetermined DC gate bias voltage is applied between the gate and source electrodes; is provided with a protective circuit for preventing damage to the field effect transistor by an excessive input signal that is, by over-drive, and which includes a source resistor connected in series with the source electrode and a constant voltage element, for example, constituted by one or more diodes, connected between the gate electrode and the side of the source resistor remote from the respective source electrode. The resistance value of the source resistor and the forward voltage of the diode or constant voltage element are selected so that the maximum drain or source current of each field effect transistor, when operated with an input signal applied to its gate electrode, does not exceed the maximum drain or source current of the field effect transistor in the absence of any gate-source voltage applied thereto. The source resistor of the foregoing protective circuit may further preferably be included in another protective circuit by which the input signal is shunted to the load when the impedance of the latter declines below a predetermined value, for example, in response to a short circuit in the load, so as to prevent overloading of the field effect transistor. Further, a push-pull amplifier employing triode characteristic field effect transistors with the foregoing protective circuits therefor is disclosed with a biasing circuit for stabilizing the biasing DC drain current of the field effect transistors when the operating voltage is subject to fluctuations.
摘要翻译：一种场效应晶体管放大器，包括一个或多个耗尽型场效应晶体管，优选具有三极管特性，并且具有通过负载施加在其漏源极和源电极之间的工作电压，同时要放大的输入信号施加到其栅电极并且在栅极和源极之间施加预定的DC栅极偏置电压; 具有保护电路，用于通过过驱动的过大输入信号来防止对场效应晶体管的损害，并且包括与源电极串联连接的源极电阻和例如构成的恒压元件通过一个或多个二极管连接在栅电极和远离源电极的源电阻器侧。选择源电阻器的电阻值和二极管或恒压元件的正向电压，使得当施加到其栅电极的输入信号操作时，每个场效应晶体管的最大漏极或源极电流不超过在没有施加任何栅极 - 源极电压的情况下，场效应晶体管的最大漏极或源极电流。上述保护电路的源电阻可以进一步优选地包括在另一个保护电路中，当另一个保护电路当其阻抗下降到预定值以下时，输入信号被分流到负载，例如响应于负载，以防止场效应晶体管的过载。此外，公开了一种采用具有上述保护电路的三极管特性场效应晶体管的推挽放大器，其具有用于在工作电压经受波动时稳定场效应晶体管的偏置DC漏极电流的偏置电路。

5. 发明申请

US20180152149A1 DOHERTY AMPLIFIER 审中-公开
公开(公告)号：US20180152149A1
公开(公告)日：2018-05-31
申请号：US15827541
申请日：2017-11-30
申请人： SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
发明人： Andrey Grebennikov , James Wong , Naoki Watanabe
IPC分类号： H03F1/02 , H03F3/21 , H03F3/30
CPC分类号： H03F1/0288 , H03F3/211 , H03F3/305 , H03F3/602 , H03F2200/192 , H03F2200/405 , H03F2200/451
摘要： An inverted symmetrical four-stage Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier and a plurality of peak amplifiers. Outputs of the carrier amplifier and the peak amplifiers are provided to the combining unit through the offset unit including offset transmission lines each connected with the carrier amplifier and the peak amplifiers. The offset transmission lines have characteristic impedance and electrical lengths equal to each other such that the impedance seeing the amplifiers at the ends of the offset transmission lines become substantially short-circuited.

6. 发明授权

US08193863B2 Push-pull output circuit 有权
标题翻译：推挽输出电路
公开(公告)号：US08193863B2
公开(公告)日：2012-06-05
申请号：US12887312
申请日：2010-09-21
申请人： Hiroyuki Tsurumi
发明人： Hiroyuki Tsurumi
IPC分类号： H03F3/18
CPC分类号： H03F3/3045 , H03F3/305 , H03F3/45183 , H03F2203/45674
摘要： According to one embodiment, a first transistor is connected between a first power supply rail and an output unit. A second transistor is connected between the output unit and a second power supply rail. A gm amplifier includes an input unit and first and second output terminals and amplifies a difference between a signal input to the input unit and a reference voltage. First and second current mirror circuits are connected to be vertically stacked between the first rail and the first terminal as well as a gate of the second transistor. Third and fourth current mirror circuits are connected to be vertically stacked between the second rail and the second terminal as well as a gate of the first transistor. The gate of the first transistor is connected to the first and second circuits. The gate of the second transistor is connected to the third and fourth circuits.
摘要翻译：根据一个实施例，第一晶体管连接在第一电源轨和输出单元之间。第二晶体管连接在输出单元和第二电源轨之间。 gm放大器包括输入单元和第一和第二输出端子，并放大输入到输入单元的信号与参考电压之间的差值。第一和第二电流镜电路被连接以垂直堆叠在第一轨道和第一端子之间以及第二晶体管的栅极。第三和第四电流镜电路被连接以垂直地堆叠在第二轨道和第二端子之间以及第一晶体管的栅极。第一晶体管的栅极连接到第一和第二电路。第二晶体管的栅极连接到第三和第四电路。

7. 发明授权

US4667165A High-speed full differential amplifier with common mode rejection 失效
标题翻译：具有共模抑制的高速全差分放大器
公开(公告)号：US4667165A
公开(公告)日：1987-05-19
申请号：US831012
申请日：1986-02-19
申请人： Lionel M. De Weck
发明人： Lionel M. De Weck
IPC分类号： H03F1/22 , H03F3/30 , H03F3/45
CPC分类号： H03F3/45381 , H03F3/305 , H03F3/3064 , H03F3/45659 , H03F2203/45711
摘要： A high speed low power linear two micron CMOS full differential operational amplifier has a pair of output cascode stages each providing a respective differential output with rejected common mode signals. The amplifier comprises an input differential amplifier stage driving a pair feedback current mirror loads each cross connected to the pair of cascode output stages providing the differential outputs. Current domain operation provided by current mirror arrangements enables fast operation of the full differential amplifier. Each output cascode stage comprises four stacked transistors including two signal transistors and two dynamically biased pass transistors. The feedback current mirror loads and the cascode output stages provide the amplifier with single gain stage respecting each differential output thereby reducing the need for large compensation capacitors while improving the dynamic range of the two differential outputs. The gain of amplifier is ninety decibels with a frequency bandwidth of fifty megahertz and with low power dissipation at two milliwatts. The amplifier also comprises two feedback differential stages receiving a single combined common mode signal formed from the two differential outputs. Each feedback differential stages then drives a respective pair feedback current mirror loads which provide negative feedback signals to the output cascode stages whereby common mode signals are rejected at the differential outputs.
摘要翻译：高速低功率线性二微米CMOS全差分运算放大器具有一对输出共源共栅级，每一级提供具有被拒绝的共模信号的相应的差分输出。放大器包括一个输入差分放大器级，驱动一对反馈电流反射镜负载，每个交叉连接到提供差分输出的一对共源共栅输出级。通过电流镜配置提供的电流域操作可以实现全差分放大器的快速运行。每个输出共源共栅级包括四个堆叠的晶体管，包括两个信号晶体管和两个动态偏置的通过晶体管。反馈电流镜负载和共源共栅输出级为放大器提供了与每个差分输出相关的单增益级，从而减少了对大补偿电容的需求，同时改善了两个差分输出的动态范围。放大器的增益为90分贝，频率带宽为50兆赫，功率消耗为2毫瓦。放大器还包括接收由两个差分输出形成的单个组合共模信号的两个反馈差分级。每个反馈差分级然后驱动相应的对反馈电流镜负载，其向输出共源共栅级提供负反馈信号，由此共模信号在差分输出处被拒绝。

8. 发明申请

US20170207665A1 WIRELESS ELECTRIC FIELD POWER TRANSFER SYSTEM, METHOD, TRANSMITTER AND RECEIVER THEREFOR 审中-公开
公开(公告)号：US20170207665A1
公开(公告)日：2017-07-20
申请号：US15474396
申请日：2017-03-30
申请人： Solace Power Inc.
发明人： Nagesh POLU , Mohammed Jahangir ALAM , Sheikh Mominul ISLAM , Nima SOLTANI
IPC分类号： H02J50/12 , H02J50/40 , H02J50/90 , H02J7/02
CPC分类号： H02J50/12 , B60L53/12 , B60L53/36 , B60L2210/10 , B60L2210/30 , B60L2210/40 , H01Q1/2225 , H01Q1/273 , H01Q1/3216 , H01Q7/08 , H02J7/0044 , H02J7/025 , H02J17/00 , H02J50/05 , H02J50/23 , H02J50/27 , H02J50/40 , H02J50/60 , H02J50/70 , H02J50/80 , H02J50/90 , H03F1/56 , H03F3/195 , H03F3/245 , H03F3/305 , H03F2200/09 , H03F2200/102 , H03F2200/387 , H03F2200/462 , H03F2203/30031 , H03F2203/30111 , H03F2203/30114 , H03J2200/06 , H03L7/0812 , H04B5/0037 , H04B5/0081 , Y02T10/7005 , Y02T10/7072 , Y02T10/7216 , Y02T10/7241 , Y02T10/90 , Y02T90/12 , Y02T90/121 , Y02T90/122 , Y02T90/125 , Y02T90/127 , Y02T90/14
摘要： A wireless electric field power transmission system comprises: a transmitter comprising a transmitter antenna, the transmitter antenna comprising at least two conductors defining a volume therebetween; and at least one receiver, wherein the transmitter antenna transfers power wirelessly via electric field coupling when the at least one receiver is within the volume.

9. 发明授权

US09653948B2 Wireless resonant electric field power transfer system and method using high Q-factor coils 有权
公开(公告)号：US09653948B2
公开(公告)日：2017-05-16
申请号：US13607474
申请日：2012-09-07
申请人： Nagesh Polu , Md. Jahangir Alam , Sheikh Mominul Islam , Nima Soltani
发明人： Nagesh Polu , Md. Jahangir Alam , Sheikh Mominul Islam , Nima Soltani
IPC分类号： H02J50/05 , H02J7/02 , H02J17/00 , H02J50/12 , H02J50/23 , H02J50/40 , H02J50/27 , H03F1/56 , H03F3/195 , H03F3/24 , H03F3/30 , H02J7/00 , B60L11/18 , H03L7/081 , H01Q1/22 , H01Q1/27 , H01Q1/32 , H01Q7/08 , H04B5/00 , H02J50/80 , H02J50/60
CPC分类号： H02J50/12 , B60L11/182 , B60L11/1833 , B60L2210/10 , B60L2210/30 , B60L2210/40 , H01Q1/2225 , H01Q1/273 , H01Q1/3216 , H01Q7/08 , H02J7/0042 , H02J7/025 , H02J17/00 , H02J50/05 , H02J50/23 , H02J50/27 , H02J50/40 , H02J50/60 , H02J50/70 , H02J50/80 , H02J50/90 , H03F1/56 , H03F3/195 , H03F3/245 , H03F3/305 , H03F2200/09 , H03F2200/102 , H03F2200/387 , H03F2200/462 , H03F2203/30031 , H03F2203/30111 , H03F2203/30114 , H03J2200/06 , H03L7/0812 , H04B5/0037 , H04B5/0081 , Y02T10/7005 , Y02T10/7072 , Y02T10/7216 , Y02T10/7241 , Y02T10/90 , Y02T90/12 , Y02T90/121 , Y02T90/122 , Y02T90/125 , Y02T90/127 , Y02T90/14
摘要： A wireless electric field power transmission system comprises: a transmitter comprising a transmitter antenna, the transmitter antenna comprising at least two conductors defining a volume therebetween; and at least one receiver, wherein the transmitter antenna transfers power wirelessly via electric field coupling when the at least one receiver is within the volume.

10. 发明授权

US08760225B1 BiCMOS gate driver for class-S radio frequency power amplifier 有权
标题翻译：用于S类射频功率放大器的BiCMOS栅极驱动器
公开(公告)号：US08760225B1
公开(公告)日：2014-06-24
申请号：US13736442
申请日：2013-01-08
申请人： LSI Corporation
发明人： Ross S. Wilson , Said E. Abdelli , Peter Kiss , Donald R. Laturell , Kameran Azadet , James F. MacDonald
IPC分类号： H03F3/38
CPC分类号： H03F3/2171 , H03F3/193 , H03F3/195 , H03F3/245 , H03F3/305 , H03F3/45179 , H03F3/45183 , H03F2200/78 , H03F2203/45394 , H03F2203/45456 , H03F2203/45631 , H03F2203/45702
摘要： The invention may be embodied in a resynchronizing, push-pull drive circuit for driving the gate electrodes of a digital Class-S Radio Frequency Power Amplifier (RF-PA). A binary bitstream received from a bitstream generator, such as a sigma-delta modulator, Viterbi-based optimal-bit-pattern modulator sigma-delta, or other suitable modulator, is resynchronized to a low-jitter master clock, then converted to fast-rise, high-swing complementary digital signals to drive the gates of the Class-S RF-PA. The drive circuit provides a high slew-rate, large-swing, quasi-digital gate drive circuit to drive the significant gate capacitance of the RF-PA with sufficient rise times. A combination of bipolar transistor current switches and cascoded CMOS devices is employed to attain requisite performance. For example, the driving circuit is well suited for use with Class-S RF-PAs used in wireless communication systems.
摘要翻译：本发明可以体现在用于驱动数字S类射频功率放大器（RF-PA）的栅电极的再同步推挽驱动电路中。从比特流发生器（例如，Σ-Δ调制器，基于维特比的最佳位模式调制器Σ-Δ或其它合适的调制器）接收的二进制比特流被重新同步到低抖动主时钟，上升，高挥发互补数字信号驱动S-S RF-PA的门。驱动电路提供高压摆率，大摆幅，准数字栅极驱动电路，以足够的上升时间驱动RF-PA的显着栅极电容。采用双极晶体管电流开关和级联CMOS器件的组合来实现必要的性能。例如，驱动电路非常适用于无线通信系统中使用的S类RF-PA。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式