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1. 发明授权

US06807729B2 Method of manufacturing metal foil 失效
标题翻译：制造金属箔的方法
公开(公告)号：US06807729B2
公开(公告)日：2004-10-26
申请号：US10170798
申请日：2002-06-11
申请人： Toshiyuki Kawashima , Nobuharu Tahara , Kenichi Ikeda
发明人： Toshiyuki Kawashima , Nobuharu Tahara , Kenichi Ikeda
IPC分类号： H05K320
CPC分类号： B32B15/08 , B32B5/18 , B32B7/12 , B32B27/281 , B32B27/32 , B32B27/34 , B32B27/36 , B32B37/00 , B32B2038/0076 , B32B2305/026 , B32B2311/00 , B32B2323/04 , B32B2323/10 , B32B2367/00 , B32B2377/00 , B32B2379/08 , B32B2398/10 , B32B2457/08 , H05K3/022 , H05K3/386 , H05K3/4069 , H05K3/4652 , H05K3/4655 , H05K2201/0116 , H05K2201/0154 , H05K2201/0195 , H05K2203/0191 , H05K2203/066 , H05K2203/1147 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49163 , Y10T29/49165
摘要： The present invention provides a method of manufacturing a metal foil laminated product including the steps of forming a bonding layer containing a thermosetting resin on a lower wiring layer, a metal layer or an insulating layer, provisionally bonding a porous layer having a releasing film attached thereto onto a surface of the bonding layer, peeling the releasing film from the porous layer, laminating a metal foil on the porous layer obtained after the peeling, and heating and pressurizing the laminated product to transfer the bonding layer to the metal foil and thereby integrating them. Furthermore, the present invention provides a method of manufacturing a wiring board comprising the steps of manufacturing a metal foil laminated product by the above manufacturing methods, and providing a pattern on the metal foil of the metal foil laminated product, thereby forming a wiring layer.
摘要翻译：本发明提供一种制造金属箔叠层产品的方法，包括以下步骤：在下布线层，金属层或绝缘层上形成含有热固性树脂的粘合层，临时粘合附着有剥离膜的多孔层在接合层的表面上，从多孔层剥离剥离膜，在剥离后得到的多孔层上层叠金属箔，对层叠体进行加热加压，将结合层转印到金属箔上，。此外，本发明提供一种制造布线板的方法，包括以下步骤：通过上述制造方法制造金属箔层压产品，并在金属箔叠层产品的金属箔上提供图案，从而形成布线层。

2. 发明授权

US06684496B2 Method of making an integrated circuit package 有权
标题翻译：制造集成电路封装的方法
公开(公告)号：US06684496B2
公开(公告)日：2004-02-03
申请号：US10007337
申请日：2001-10-22
申请人： Thomas P. Glenn
发明人： Thomas P. Glenn
IPC分类号： H05K320
CPC分类号： H01L23/49503 , H01L21/4842 , H01L23/3107 , H01L23/49541 , H01L23/49548 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/01037 , H01L2924/01039 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , Y10T29/49121 , Y10T29/49126 , Y10T29/4913 , Y10T29/49146 , Y10T29/49155 , Y10T29/49171 , Y10T428/24207 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/85399
摘要： A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad. The die is electrically connected to the tabs. An encapsulant is applied to the upper and side surfaces of the leadframe. Finally, the leadframe is cut in situ so that the die pad and tabs are severed from the frame, the sides of the package are formed, and the package is severed from the leadframe.
摘要翻译：制造包装的方法包括提供具有矩形框架中的管芯焊盘的金属引线框架。标签从框架向模片垫延伸。管芯焊盘和突片具有侧表面，其具有凹入部分和凹凸。芯片贴在裸片上。模具电连接到突片。将密封剂施加到引线框架的上表面和侧表面。最后，将引线框架原位切割，使得芯片焊盘和突片从框架上切断，形成封装的侧面，并将封装与引线框架切断。

3. 发明授权

US06640430B2 Method of manufacturing a printed circuit board 有权
标题翻译：印刷电路板的制造方法
公开(公告)号：US06640430B2
公开(公告)日：2003-11-04
申请号：US10037733
申请日：2002-01-02
申请人： Akihiro Kusaka
发明人： Akihiro Kusaka
IPC分类号： H05K320
CPC分类号： H05K1/028 , H05K1/095 , H05K2201/09227 , H05K2201/09236 , H05K2201/09727 , Y10T29/49117 , Y10T29/49124 , Y10T29/49128 , Y10T29/49155 , Y10T29/49224
摘要： The printed circuit board according to the invention is highly reliable because a gap width between adjoining first conductive pattern bent parts is formed greater than a gap width in those of wiring parts positioned close to and on both sides of the first conductive pattern bent parts and accordingly, even if any running part arises in the conductive pattern bent parts, short-circuiting is unlikely to occur between wiring patterns, thus making the printed circuit board reliable.
摘要翻译：根据本发明的印刷电路板是高度可靠的，因为相邻的第一导电图案弯曲部分之间的间隙宽度形成得大于位于第一导电图案弯曲部分附近和两侧的布线部分的间隙宽度即使在导电图案弯曲部分中出现任何运行部分，也不可能在布线图案之间发生短路，从而使得印刷电路板可靠。

4. 发明授权

US06584682B2 Method for making circuit board 失效
标题翻译：电路板制作方法
公开(公告)号：US06584682B2
公开(公告)日：2003-07-01
申请号：US09812345
申请日：2001-03-20
申请人： Robert Edward Belke , Thomas Bernd Krautheim , Vivek Amir Jairazbhoy , Delin Li
发明人： Robert Edward Belke , Thomas Bernd Krautheim , Vivek Amir Jairazbhoy , Delin Li
IPC分类号： H05K320
CPC分类号： H05K3/4038 , H05K3/0047 , H05K3/06 , H05K3/062 , H05K3/064 , H05K3/4069 , H05K3/429 , H05K3/44 , H05K3/445 , H05K3/4608 , H05K3/4611 , H05K3/4623 , H05K3/4641 , H05K2201/0305 , H05K2201/0352 , H05K2201/0355 , H05K2201/0361 , H05K2201/0379 , H05K2201/0397 , H05K2201/09309 , H05K2201/09509 , H05K2201/09554 , H05K2201/09563 , H05K2201/09609 , H05K2201/09881 , H05K2203/0369 , H05K2203/066 , H05K2203/0733 , H05K2203/1152 , H05K2203/1184 , H05K2203/1536 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A method 10 for making multi-layer electronic circuit boards 148, 248 having aperture 146, 246 which may be selectively connected to an electrical ground potential.
摘要翻译：一种用于制造具有孔146,246的多层电子电路板148,248的方法10，其可选择性地连接到电接地电位。

5. 发明授权

US06321443B1 Connection substrate 失效
标题翻译：连接基板
公开(公告)号：US06321443B1
公开(公告)日：2001-11-27
申请号：US08973924
申请日：1998-05-13
申请人： Hans-Jürg Barte , Ewald Losert , Heinrich Meyer , Günter Röhrs , Frank Rudolf , Wolfgang Scheel , Walter Schmidt , Theis Zur Nieden
发明人： Hans-Jürg Barte , Ewald Losert , Heinrich Meyer , Günter Röhrs , Frank Rudolf , Wolfgang Scheel , Walter Schmidt , Theis Zur Nieden
IPC分类号： H05K320
CPC分类号： H05K3/284 , H01L23/50 , H01L23/5385 , H01L25/065 , H01L25/162 , H01L2224/16225 , H05K1/0203 , H05K1/189 , H05K3/0058 , H05K2201/0209 , H05K2201/042 , H05K2201/046 , H05K2201/2009 , H05K2203/1316 , Y10S428/901 , Y10T29/49128 , Y10T29/49155
摘要： The method for the manufacture of multilayer connecting substrates with multiple functions comprises the design of the connecting substrate taking place in functionally separated manner, in that signal conducting substrate parts (19), power supplying substrate parts (2), mechanical substrate parts (7), as well as the arrangement of components (4) or component-carrying substrate parts is separately planned and optimized as independent functions or modules and finally associated with spatially separated functional areas (inner/outer) of the overall circuit, the design taking place by the connection of the modules to an overall circuit embodying the connecting substrate. The resulting multilayer circuit with conductor network (19, 2), components (4) and mechanical stiffening elements (7) has the following structure. The substrate parts with the fine, dense and flexible elements are associated with the inner areas of the overall circuit, the substrate parts with the rigid elements and/or components are associated with the outer areas of the overall circuit and a stiffening support material is so placed in the outer area that the circuit is given a mechanical support structure, which is designed in locally rigid manner passing into flexible areas. The overall circuit is folded and/or wound corresponding to the rigid and flexible portions. The mechanical support structure can be formed by separately produced apparatus housing parts or by the apparatus housing.
摘要翻译：用于制造具有多种功能的多层连接基板的方法包括以功能分离的方式进行的连接基板的设计，信号传导基板部件（19），供电基板部件（2），机械基板部件（7）以及部件（4）或部件承载基板部件的布置被单独计划和优化为独立的功能或模块，并最终与整个电路的空间分离的功能区域（内部/外部）相关联，设计发生在模块连接到体现连接基板的整个电路。所得到的具有导体网络（19,2），部件（4）和机械加强元件（7）的多层电路具有以下结构。具有精细，致密和柔性的元件的基板部件与整个电路的内部区域相关联，具有刚性元件和/或部件的基板部件与整个电路的外部区域相关联，并且加强支撑材料是如此放置在外部区域，电路被给予机械支撑结构，其以局部刚性的方式被设计成通过柔性区域。整个电路根据刚性和柔性部分折叠和/或缠绕。机械支撑结构可以通过单独制造的装置壳体部件或装置壳体形成。

6. 发明授权

US06499214B2 Method of making a circuit board 失效
标题翻译：制作电路板的方法
公开(公告)号：US06499214B2
公开(公告)日：2002-12-31
申请号：US09812449
申请日：2001-03-20
申请人： Delin Li , Richard Keith McMillan , Zhong-You Shi
发明人： Delin Li , Richard Keith McMillan , Zhong-You Shi
IPC分类号： H05K320
CPC分类号： H05K3/429 , H05K3/0047 , H05K3/06 , H05K3/062 , H05K3/064 , H05K3/4038 , H05K3/4069 , H05K3/44 , H05K3/445 , H05K3/4608 , H05K3/4611 , H05K3/4623 , H05K3/4641 , H05K3/4685 , H05K2201/0305 , H05K2201/0352 , H05K2201/0355 , H05K2201/0361 , H05K2201/0379 , H05K2201/0397 , H05K2201/09309 , H05K2201/09509 , H05K2201/09554 , H05K2201/09563 , H05K2201/09609 , H05K2201/09845 , H05K2201/09881 , H05K2203/0369 , H05K2203/066 , H05K2203/0733 , H05K2203/1152 , H05K2203/1184 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T428/24917
摘要： A method 10, 110 for making multi-layer circuit boards having metallized apertures 38, 40, 130, 132 which may be selectively and electrically grounded and having at least one formed air-bridge 92, 178.
摘要翻译：一种用于制造具有金属化孔38,40,130,132的多层电路板的方法10,110，其可以选择性地和电接地并且具有至少一个形成的空气桥92,178。

7. 发明授权

US06467161B2 Method for making a circuit board 失效
标题翻译：制作电路板的方法
公开(公告)号：US06467161B2
公开(公告)日：2002-10-22
申请号：US09812989
申请日：2001-03-20
申请人： Achyuta Achari , Brenda Joyce Nation , Delin Li , Lakhi N. Goenka , Richard Keith McMillan , Vivek A. Jairazbhoy
发明人： Achyuta Achari , Brenda Joyce Nation , Delin Li , Lakhi N. Goenka , Richard Keith McMillan , Vivek A. Jairazbhoy
IPC分类号： H05K320
CPC分类号： H05K3/4685 , H05K3/0047 , H05K3/06 , H05K3/062 , H05K3/064 , H05K3/4038 , H05K3/4069 , H05K3/429 , H05K3/44 , H05K3/445 , H05K3/4608 , H05K3/4611 , H05K3/4623 , H05K3/4641 , H05K2201/0305 , H05K2201/0352 , H05K2201/0355 , H05K2201/0361 , H05K2201/0379 , H05K2201/0397 , H05K2201/09309 , H05K2201/09509 , H05K2201/09554 , H05K2201/09563 , H05K2201/09609 , H05K2201/09845 , H05K2201/09881 , H05K2203/0369 , H05K2203/066 , H05K2203/0733 , H05K2203/1152 , H05K2203/1184 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A method 10, 110 for making multi-layer electronic circuit boards 82, 148 having metallized apertures 18, 20, 118, 120 which may be selectively and electrically connected to a source of ground potential.
摘要翻译：一种用于制造具有金属化孔18,20,118,120的多层电子电路板82,148的方法10,110，其可以选择性地和电连接到地电位源。

8. 发明授权

US06381836B1 Clip and pin field for IC packaging 失效
标题翻译：夹子和针脚领域的IC封装
公开(公告)号：US06381836B1
公开(公告)日：2002-05-07
申请号：US09027582
申请日：1998-02-23
申请人： Jeff Lauruhn , Duncan MacGregor
发明人： Jeff Lauruhn , Duncan MacGregor
IPC分类号： H05K320
CPC分类号： H05K7/1007 , H01L23/4093 , H01L23/467 , H01L2924/0002 , H01L2924/3011 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49139 , H01L2924/00
摘要： An electronic assembly that incorporates a heat sink. The subassembly includes an integrated circuit package that is mounted to a substrate. The substrate is mounted to a spacer block which includes a pin field that contains a plurality of pins. The heat sink is coupled to the integrated circuit package by a clip that wraps around the sink and is attached to the spacer block.
摘要翻译：包含散热器的电子组件。子组件包括安装到基板的集成电路封装。衬底安装到包括具有多个销的引脚区域的间隔块。散热器通过围绕水槽的夹子连接到集成电路封装，并附接到间隔块。

9. 发明授权

US06834426B1 Method of fabricating a laminate circuit structure 失效
标题翻译：制造层叠电路结构的方法
公开(公告)号：US06834426B1
公开(公告)日：2004-12-28
申请号：US09625135
申请日：2000-07-25
申请人： Robert M. Japp , Gregory A. Kevern , William J. Rudik
发明人： Robert M. Japp , Gregory A. Kevern , William J. Rudik
IPC分类号： H05K320
CPC分类号： H05K3/4641 , H05K3/4069 , H05K3/445 , H05K3/4614 , H05K2201/09536 , H05K2201/096 , H05K2201/09881 , H05K2201/10378 , Y10T29/49126 , Y10T29/49128 , Y10T29/49165
摘要： A method for fabricating a laminate circuit structure is provided. The method comprises: providing at least two modularized circuitized voltage plane subassemblies wherein each of the subassemblies comprise at least two signal planes having an external and internal surface disposed about an internal voltage plane; providing a dielectric material between the signal and voltage planes; and providing dielectric on each external surface of each signal plane; and providing a non-cured or partially cured curable dielectric composition between the subassemblies wherein the dielectric composition comprises, dielectric material that is of the same material as the dielectric material used in said subassemblies, aligning the subassemblies, and then laminating to cause bonding of the subassemblies.
摘要翻译：提供一种制造叠层电路结构的方法。该方法包括：提供至少两个模块化的电路化电压平面子组件，其中每个子组件包括至少两个具有围绕内部电压平面设置的外部和内部表面的信号平面; 在信号和电压平面之间提供介电材料; 并在每个信号平面的每个外表面上提供电介质; 并且在所述子组件之间提供未固化或部分固化的可固化电介质组合物，其中所述电介质组合物包括与所述子组件中使用的介电材料具有相同材料的介电材料，对准所述子组件，然后层压以引起子组件

10. 发明授权

US06739041B2 Circuit board and a method for making the same 失效
标题翻译：电路板及其制作方法
公开(公告)号：US06739041B2
公开(公告)日：2004-05-25
申请号：US09815234
申请日：2001-03-22
申请人： Bharat Z. Patel , Jay D. Baker , Mohan R. Paruchuri
发明人： Bharat Z. Patel , Jay D. Baker , Mohan R. Paruchuri
IPC分类号： H05K320
CPC分类号： H05K3/462 , H05K3/0047 , H05K3/06 , H05K3/062 , H05K3/064 , H05K3/4038 , H05K3/4069 , H05K3/429 , H05K3/44 , H05K3/445 , H05K3/4608 , H05K3/4611 , H05K3/4623 , H05K3/4641 , H05K3/4685 , H05K2201/0305 , H05K2201/0352 , H05K2201/0355 , H05K2201/0361 , H05K2201/0379 , H05K2201/0397 , H05K2201/09309 , H05K2201/09509 , H05K2201/09554 , H05K2201/09563 , H05K2201/09609 , H05K2201/09845 , H05K2201/09881 , H05K2203/0369 , H05K2203/066 , H05K2203/0733 , H05K2203/1152 , H05K2203/1184 , H05K2203/1536 , Y10T29/49117 , Y10T29/49128 , Y10T29/49153 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A method 10, 90 for making a multi-layer electronic circuit board 82, 168 including the steps of forming at least one protuberance 15, 100 upon an electrically conductive member 12, 92 and adding additional electrically conductive layers of material 34, 56, 58, 104, 114, 138, 140 to the member 12, 92 while selectively extending the protuberance 15, 100 within the layers 82, 168, thereby forming a circuit board 82, 168. A portion of the formed circuit board may be etched in order to selectively create air-bridges 86 or interconnection portions 164.
摘要翻译：一种用于制造多层电子电路板82,168的方法10,90，包括在导电构件12,92上形成至少一个突起15,100的步骤，并且添加另外的材料34,56,58的导电层，104,114,138,140连接到构件12,92，同时在层82,168内选择性地延伸突起15,100，从而形成电路板82,168。形成的电路板的一部分可以按顺序蚀刻以选择性地产生空气桥86或互连部分164。

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