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    • 11. 发明授权
    • Low power high speed A/D converter
    • 低功率高速A / D转换器
    • US08638252B2
    • 2014-01-28
    • US13306982
    • 2011-11-30
    • Mahdi Davoodabadi
    • Mahdi Davoodabadi
    • H03M1/16
    • H03M1/002H03M1/146H03M1/365
    • An analog-to-digital converter comprises a first set of comparators configured for generating a coarse digital measurement of an analog input signal, and a second set of comparators for performing a fine digital measurement of the analog input signal. The second set comprises a plurality of dynamic comparators, wherein each dynamic comparator is configurable for being activated by a clock signal. An activation circuit processes the coarse measurement and an input clock signal for generating a set of activation signals, which activate a subset of the dynamic comparators to generate the fine digital measurement.
    • 模数转换器包括被配置用于产生模拟输入信号的粗略数字测量的第一组比较器和用于执行模拟输入信号的精细数字测量的第二组比较器。 第二组包括多个动态比较器,其中每个动态比较器可配置为由时钟信号激活。 激活电路处理粗略测量和输入时钟信号以产生一组激活信号,其激活动态比较器的子集以产生精细数字测量。
    • 18. 发明申请
    • Direct Coupled Biasing Circuit for High Frequency Applications
    • 直接耦合偏置电路用于高频应用
    • US20150357999A1
    • 2015-12-10
    • US14828955
    • 2015-08-18
    • TENSORCOM, INC.
    • Zaw SoeKhongMeng Tham
    • H03K3/012H01Q1/50H03K17/56
    • H03K3/012G05F3/16H01Q1/50H03K17/56H04B5/0075
    • This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.
    • 当设计高频(〜60GHz)电路时,本发明消除了对“电容器耦合”或“变压器耦合”的需求以及与这些耦合技术相关联的不期望的寄生电容和电感。 在这个频率下,两个相邻阶段之间的距离需要最小化。 与电源或接地引线串联的谐振电路用于将偏置信号与高频信号隔离开来。 该谐振电路的引入允许使用金属迹线将第一级“直接耦合”到下一级。 “直接耦合”技术将高频信号和偏置电压都通过下一级。 与“交流耦合”或“变压器耦合”方法相比,“直接耦合”方法克服了大的管芯面积使用,因为既不需要电容器也不需要变压器来在级之间传输高频信号。
    • 19. 发明授权
    • Method and apparatus for a clock and signal distribution network for a 60 GHz transmitter system
    • 用于60 GHz发射机系统的时钟和信号分配网络的方法和装置
    • US08873339B2
    • 2014-10-28
    • US13572519
    • 2012-08-10
    • Jiashu Chen
    • Jiashu Chen
    • H04B1/02H03B27/00G01S7/491G01S7/484G01S5/02
    • H03B27/00G01S5/0226G01S7/484G01S7/4911G06F1/10H01L2223/6677H01L2224/16227H01L2924/15311H03K5/15
    • Herein is presented, a low power on-die 60 GHz distribution network for a beamforming system that can be scaled as the number of transmitters increases. The transmission line based power splitters and quadrature hybrids whose size would be proportional to a quarter wavelength (˜600 μm) if formed using transmission lines are instead constructed by inductors/capacitors and reduce the area by more than 80%. An input in-phase I clock and an input quadrature Q clock are combined into a single composite clock waveform locking the phase relation between the in-phase I clock and quadrature Q clock. The composite clock is transferred over a single transmission line formed using a Co-planar Waveguide (CPW) coupling the source and destination locations over the surface of a die. Once the individuals the in-phase I and quadrature Q clocks are required, they can be generated at the destination from the composite clock waveform.
    • 本文提出了一种用于波束成形系统的低功率裸片60GHz分布网络,可以随着发射机数量的增加而进行缩放。 如果使用传输线形成,尺寸将与四分之一波长(〜600μm)成比例的传输线路功率分配器和正交混合器由电感器/电容器构成,并将面积减少80%以上。 输入同相I时钟和输入正交Q时钟被组合成锁定同相I时钟和正交Q时钟之间的相位关系的单个复合时钟波形。 复合时钟通过使用耦合在晶片表面上的源和目的位置的共平面波导(CPW)形成的单个传输线传输。 一旦个体需要同相I和正交Q时钟,它们可以从复合时钟波形在目的地产生。
    • 20. 发明授权
    • Method and apparatus of a crystal oscillator with a noiseless and amplitude based start up control loop
    • 具有无噪声和振幅的启动控制回路的晶体振荡器的方法和装置
    • US08816786B2
    • 2014-08-26
    • US13632173
    • 2012-10-01
    • Tensorcom, Inc.
    • KhongMeng Tham
    • H03L5/00H03B5/36
    • H03B5/364H03B5/06H03B2200/0088H03B2200/0094H03B2201/031H03L5/00
    • A large gain is used to start up the oscillation of the crystal quickly. Once the oscillation starts, the amplitude is detected. A control circuit determines based on the measured amplitude to disable a low resistance path in the controlled switch array to reduce the applied gain below the power dissipation specification of the crystal. Another technique introduces a mixed-signal controlled power supply multi-path resistive array which tailors the maximum current to the crystal. A successive approximation register converts the amplitude into several partitions and enables/disables one of several power routing paths to the inverter of the oscillator. This allows a better match between the crystal selected by the customer and the on-chip drive circuitry to power up the oscillator without stressing the crystal. The “l/f” noise of the oscillator circuit is minimized by operating transistors in the triode region instead of the linear region.
    • 使用大的增益快速启动晶体振荡。 一旦振荡开始,就检测振幅。 控制电路基于测量的幅度来确定禁用受控开关阵列中的低电阻路径,以将施加的增益降低到低于晶体的功率耗散规格。 另一种技术引入了一种混合信号控制电源多路径电阻阵列,可以调整晶体的最大电流。 逐次逼近寄存器将振幅转换成几个分区,并使能/禁用振荡器的反相器的几个电源路由路径之一。 这允许由客户选择的晶体和片上驱动电路之间更好地匹配,以在不强调晶体的情况下加电振荡器。 通过在三极管区域中操作晶体管而不是线性区域来使振荡器电路的“l / f”噪声最小化。