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11. 发明授权

US5157675A Apparatus utilizing light emitting semiconductor device 失效
公开(公告)号：US5157675A
公开(公告)日：1992-10-20
申请号：US813003
申请日：1991-12-24
申请人： Takeshi Takagi
发明人： Takeshi Takagi
IPC分类号： G02F3/02 , H01L33/06 , H01L33/30 , H01L33/38 , H01L33/40 , H01S5/042 , H01S5/06 , H01S5/062 , H01S5/223 , H01S5/34 , H03K19/14
CPC分类号： H01L33/40 , B82Y20/00 , G02F3/026 , H01S5/0601 , H01S5/34 , H03K19/14 , H01L33/06 , H01L33/30 , H01L33/38 , H01S5/0425 , H01S5/06 , H01S5/0602 , H01S5/06213 , H01S5/0622 , H01S5/06243 , H01S5/2231
摘要： Disclosed is an apparatus utilizing a light emitting semiconductor device which has a pumped region and an unpumped absorber region and in which an active layer has a quantum well structure. In this light emitting semiconductor device, driving current/light output characteristics have dependence on the pulse width of a driving current. A logic unit or a noise reducing apparatus is realized utilizing this property. Furthermore, in the above described light emitting semiconductor device, the central wavelength of emitted light has dependence on a driving current or dependence on driving time. A light beam scanner can be realized utilizing this property.

12. 发明授权

US5065044A Method for driving a pnpn semiconductor device 失效
标题翻译：驱动PNPN半导体器件的方法
公开(公告)号：US5065044A
公开(公告)日：1991-11-12
申请号：US426303
申请日：1989-10-24
申请人： Kenichi Kasahara , Ichiro Ogura , Yoshiharu Tashiro
发明人： Kenichi Kasahara , Ichiro Ogura , Yoshiharu Tashiro
IPC分类号： G02F1/015 , G02F3/02 , G11C11/39 , H01L29/74 , H01L31/111 , H03K17/78 , H03K19/14
CPC分类号： G11C11/39 , Y10S359/90
摘要： At least one electric pulse having a predetermined voltage which is higher than a switching voltage for a pnpn semiconductor device and a predetermined width is applied across the pnpn semiconductor device. The electric pulse width is set not to turn the pnpn semiconductor device on. Consequently, a predetermined amount of carriers are accumulated in the pnpn semiconductor device. In this circumstance, a trigger light is supplied to the pnpn semiconductor device to be turned on. As a result, an energy of the trigger light is largely decreased as compared to a conventional method.

13. 发明授权

US5051573A Optical logic operation system 失效
标题翻译：光逻辑运算系统
公开(公告)号：US5051573A
公开(公告)日：1991-09-24
申请号：US435739
申请日：1989-11-14
申请人： Yoshihiko Mizushima , Kazutoshi Nakajima , Toru Hirohata , Takashi Iida , Yoshihisa Warashina , Kenichi Sugimoto , Hirofumi Kan
发明人： Yoshihiko Mizushima , Kazutoshi Nakajima , Toru Hirohata , Takashi Iida , Yoshihisa Warashina , Kenichi Sugimoto , Hirofumi Kan
IPC分类号： H03K19/14
CPC分类号： H03K19/14
摘要： A plurality of ultra-high speed light receiving elements are provided each of which has two rectifier junctions being connected to each other opposite in polarity and has a substantially symmetrical electrode arrangement. A bias voltage is applied to each of the light receiving elements from one or a plurality of power sources. Electrical signals produced by the light receiving elements in response to input optical pulse signals are superposed on one another to produce one or a plurality of output electrical signals representing a predetermined logic operation with respect to the input optical pulse signals. Depending on the arrangement of its elements, the optical logic operation system functions as an OR circuit, AND circuit, NOT circuit, EXCLUSIVE OR circuit, or half-adder circuit.
摘要翻译：提供了多个超高速光接收元件，每个超高速光接收元件具有彼此相反极性连接的两个整流器接头，并且具有基本上对称的电极布置。偏置电压从一个或多个电源施加到每个光接收元件。响应于输入光脉冲信号由光接收元件产生的电信号彼此重叠以产生表示相对于输入光脉冲信号的预定逻辑运算的一个或多个输出电信号。根据其元件的布置，光逻辑操作系统用作OR电路，AND电路，NOT电路，EXCLUSIVE OR电路或半加法器电路。

14. 发明授权

US4999486A Optoelectric logic array 失效
标题翻译：光电逻辑阵列
公开(公告)号：US4999486A
公开(公告)日：1991-03-12
申请号：US414004
申请日：1989-09-29
申请人： R. Aaron Falk
发明人： R. Aaron Falk
IPC分类号： G06E1/04 , G06E1/06 , H03K19/14
CPC分类号： H03K19/14 , G06E1/04 , G06E1/065
摘要： The invention comprises a semiconductor substrate with a plurality of photoconductive elements. The photoconductive elements are connected to form combinational logic gates. An optic substrate overlies the semiconductor substrate and directs light representing logic parameters onto the logic gates. The combinational logic gates have complementary inputs and complementary outputs such that combinational logic can be carried out using only AND and OR gates.
摘要翻译：本发明包括具有多个光电导元件的半导体衬底。光电导元件连接形成组合逻辑门。光学基片覆盖在半导体衬底上，并将代表逻辑参数的光引导到逻辑门上。组合逻辑门具有互补输入和互补输出，使得仅使用AND和OR门可以执行组合逻辑。

15. 发明授权

US4959534A Differential optical logic arrangement 失效
标题翻译：差分光逻辑布置
公开(公告)号：US4959534A
公开(公告)日：1990-09-25
申请号：US399730
申请日：1989-08-28
申请人： Anthony L. Lentine , David A. B. Miller
发明人： Anthony L. Lentine , David A. B. Miller
IPC分类号： G02F3/02 , H03K19/14
CPC分类号： G02F3/028 , H03K19/14
摘要： Apparatus having a first electrical circuit, comprising a plurality of photodetectors interconnected such that the first circuit corresponds to any given logic function, is connected in series with a second circuit comprising a plurality of photodetectors interconnected as the conduction complement of the connections of the first circuit. The apparatus performs optical logic without optical cascading since the first and second circuits control the generation of an optical output beam based on the value that the given logic function assumes in response to a plurality of optical signal beams incident on the photodetectors of the first circuit and a plurality of complementary beams incident on the photodetectors of the second circuit. A complementary optical output is obtained and time-sequential operation is effected when two, serially connected quantum well pin diodes comprising an S-SEED are used to generate optical output beams in response to the voltage developed by the first circuit.

16. 发明授权

US4779235A Parallel operation optical processor unit 失效
标题翻译：并行运算光处理器单元
公开(公告)号：US4779235A
公开(公告)日：1988-10-18
申请号：US814471
申请日：1985-12-30
申请人： Keiichi Kubota
发明人： Keiichi Kubota
IPC分类号： H03K19/14 , G02F3/00 , G11C7/00 , G11C8/00
CPC分类号： G11C7/005
摘要： An optical data processing unit for parallel processing operation is based on one or more successively mutually superimposed optical memory plates and light directing members for controlling the application of input optical data to the memory plates, each memory plate being formed of a planar array of electro-optical memory elements capable of memorizing optical data incident thereon and emitting corresponding optical data thereafter. The memory elements preferably consist of bistable semiconductor laser diodes, enabling an extremely high speed of data processing and logic function switching to be achieved.
摘要翻译：用于并行处理操作的光学数据处理单元基于一个或多个相继重叠的光学存储器板和用于控制输入光学数据应用于存储器板的光导元件，每个存储器板由电 - 能够存储入射到其上的光学数据的光学存储元件，此后发射对应的光学数据。存储器元件优选地由双稳态半导体激光二极管组成，能够实现极高的数据处理速度和逻辑功能切换。

17. 发明授权

US4621204A Sensor integrator system 失效
标题翻译：传感器积分器系统
公开(公告)号：US4621204A
公开(公告)日：1986-11-04
申请号：US634574
申请日：1984-07-26
申请人： Mark C. Loessel , Randall W. Miller , Robert W. Myers
发明人： Mark C. Loessel , Randall W. Miller , Robert W. Myers
IPC分类号： H03M1/52 , G01J1/44 , G01J1/46 , G01N21/27 , H03M1/00 , H03K19/14 , H03K5/00 , H03K5/22
CPC分类号： G01N21/27 , G01J1/44 , H03M1/445 , G01J1/46 , G01J2001/446 , G01N2021/478 , G01N2201/126
摘要： A sensor-integrator circuit having a sensor for producing a current varying in accordance with the sensed parameter or a reference current source, a comparator having inverting and noninverting inputs and an output and charge storage device coupled to the inverting input. The circuit is energized to obtain a given positive steady state reset voltage, a reference voltage is applied to the noninverting input of a comparator which is less positive than the steady state voltage and integration is initiated solely by alternately applying the current from the sensor and the reference current to the inverting input of the comparator.
摘要翻译：一种传感器积分电路，其具有用于产生根据感测参数或参考电流源变化的电流的传感器，具有反相和同相输入的比较器以及耦合到反相输入的输出和电荷存储装置。电路通电以获得给定的正稳态复位电压，参考电压施加到比稳态电压小正比的比较器的非反相输入，并且仅通过交替施加来自传感器的电流和参考电流到比较器的反相输入。

18. 发明授权

US4058735A Opto-electronic contact mechanism 失效
标题翻译：光电接触机构
公开(公告)号：US4058735A
公开(公告)日：1977-11-15
申请号：US681514
申请日：1976-04-29
申请人： Franz Tippner
发明人： Franz Tippner
IPC分类号： H03K17/78 , H03K19/14 , G02B27/00
CPC分类号： H03K19/14 , H03K17/78
摘要： The invention relates to an opto-electronic contact mechanism in which a potential of an input circuit is separated from the potential of an output circuit by two optocouplers. The optocouplers contain an excitor circuit having a radiation transmitter and also a radiation receiver optically coupled to the transmitter, all within a common housing. The mechanism utilizes a pulsed operational mode to distinguish normal operation from erroneous operation.
摘要翻译：本发明涉及一种光电接触机构，其中输入电路的电位通过两个光耦合器与输出电路的电位分离。光耦合器包含具有辐射发射器的激发器电路，以及光学耦合到发射器的辐射接收器，全部在公共壳体内。该机制利用脉冲操作模式来区分正常操作和错误操作。

19. 发明授权

US3995173A Solid state fail-safe logic system 失效
标题翻译：固态故障安全逻辑系统
公开(公告)号：US3995173A
公开(公告)日：1976-11-30
申请号：US574667
申请日：1975-05-05
申请人： Henry C. Sibley
发明人： Henry C. Sibley
IPC分类号： H03K17/60 , H03K19/007 , H03K19/14 , H03K17/78
CPC分类号： H03K19/14 , H03K17/601 , H03K19/007
摘要： A solid state fail-safe logic system is disclosed including AND and OR gates which are designed as an evolutionary replacement for signal control functions previously performed by vital front and back contacts of vital relays and power check logic. The AND gate is basic and accepts an a.c. and a d.c. input. The a.c. input circuit includes a light emitting diode optically coupled to a light receiving active circuit means. Leakage currents cannot falsely activate the gate since the light emitting diode is poled to be reverse biased by the supply voltage. The d.c. input is protected from leakage currents by proper connections so that any leakage current is of the wrong polarity to produce an output. The d.c. input provides forward bias for light responsive active circuit means. The AND gate is divided into an input module including the light emitting diode and an output module inciuding the light responsive active circuit means. An OR gate is provided by using an AND gate output module and one AND gate input module for each OR gate input.More complex logic functions can be implemented and other devices, such as relays, simulated, by combining the AND or OR gates with other circuits.
摘要翻译：公开了一种固态故障安全逻辑系统，其包括AND和OR门，其被设计为先前由重要的继电器和功率检查逻辑的重要的前后接点执行的信号控制功能的进化替代。和门是基本的，并接受一个。和d.c. 输入。 a.c. 输入电路包括光耦合到光接收有源电路装置的发光二极管。泄漏电流不能错误地激活栅极，因为发光二极管被极化以被电源电压反向偏置。直径通过适当的连接来保护输入免受漏电流的影响，从而产生输出的任何漏电流都是错误的极性。直径输入为光响应有源电路装置提供正向偏置。与门分为包括发光二极管的输入模块和包含光响应有源电路装置的输出模块。通过使用与门输出模块和每个或门输入的一个与门输入模块来提供或门。

20. 发明授权

US3895241A LED coupled switching circuits 失效
标题翻译： LED耦合开关电路
公开(公告)号：US3895241A
公开(公告)日：1975-07-15
申请号：US46696274
申请日：1974-05-06
申请人： INT RECTIFIER CORP
发明人： COOPER DAVID
IPC分类号： H03K17/79 , H03K17/795 , H03K3/42 , H03K19/14
CPC分类号： H03K17/79 , H03K17/7955 , Y10T307/773
摘要： LED coupled switching circuits are provided with at least two solid state light-emitting source devices which activate corresponding light-responsive switching devices to produce outputs related to the state of excitation of the solid state light sources. At least one of the light-responsive switching devices in the output circuit is connected in Darlington type arrangements with a power transistor.
摘要翻译： LED耦合开关电路设置有至少两个固态发光源装置，其激活对应的光响应开关装置以产生与固态光源的激发状态相关的输出。输出电路中的光响应开关器件中的至少一个以达林顿型装置与功率晶体管连接。

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