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1. 发明申请

US20220085816A1 Clock and Periodic Computing Machines 有权
公开(公告)号：US20220085816A1
公开(公告)日：2022-03-17
申请号：US17531788
申请日：2021-11-21
申请人： Michael Stephen Fiske
发明人： Michael Stephen Fiske
IPC分类号： H03K19/17736 , H03K19/017 , H03K19/14 , H03K3/0233 , G06F21/60
摘要： A new computational machine is invented, called a clock machine, that is a novel alternative to computing machines (digital computers) based on logic gates. In an embodiment, computation is performed with one or more clock machines that use time, and can perform any Boolean function. In an embodiment, a cryptographic cipher is implemented with random clock machines, constructed from a non-deterministic process, wherein the compiled set of instructions (i.e., the implementation of the cryptographic procedure) is distinct on each device or chip that executes the cryptographic cipher. In an embodiment, by using a different set of clock machines to execute two different instances of the same cryptographic procedure, each execution of a procedure looks different to malware that may try to infect and subvert the cryptographic procedure. This cryptographic process helps hinder timing attacks. In an embodiment, a detailed implementation of the Midori cipher with random clock machines is described.

2. 发明授权

US10727791B2 I—V conversion module 有权
公开(公告)号：US10727791B2
公开(公告)日：2020-07-28
申请号：US16057216
申请日：2018-08-07
申请人： SHENZHEN GOODIX TECHNOLOGY CO., LTD.
发明人： Mengwen Zhang
IPC分类号： H03F3/08 , H03F1/42 , H03K19/14 , H03G1/00 , H03G3/30 , G01B15/00 , H03G3/00 , H03F3/70 , H03F3/72 , H03F3/00 , H03F1/02 , H03K3/012 , G05F1/565 , H03G5/12
摘要： An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

3. 发明授权

US09930325B2 Minimum-spacing circuit design and layout for PICA 有权
公开(公告)号：US09930325B2
公开(公告)日：2018-03-27
申请号：US14939788
申请日：2015-11-12
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Herschel A Ainspan , Seongwon Kim , Franco Stellari , Alan J. Weger
IPC分类号： H03K19/00 , H04N17/00 , H03K19/094 , H03K19/14 , G01R31/26 , G01J1/44 , G01J11/00 , G01J1/42
CPC分类号： H04N17/002 , G01J1/44 , G01J11/00 , G01J2001/4238 , G01R31/26 , H03K19/094 , H03K19/14
摘要： Methods for testing the resolution of an imaging device include forming a plurality of semiconductor devices having proximal light emitting regions, such that the light emitting regions are grouped into distinct shapes separated by a distance governed by a target resolution size. The semiconductor devices are activated by providing an input signal. Light emissions from one or more of the activated semiconductor devices are suppressed by providing one or more select signals.

4. 发明授权

US09081049B2 Minimum-spacing circuit design and layout for PICA 有权
标题翻译： PICA的最小间距电路设计和布局
公开(公告)号：US09081049B2
公开(公告)日：2015-07-14
申请号：US14012668
申请日：2013-08-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Herschel A. Ainspan , Seongwon Kim , Franco Stellari , Alan J. Weger
IPC分类号： H03K19/00 , G01R31/26 , H03K19/094 , H03K19/14
CPC分类号： H04N17/002 , G01J1/44 , G01J11/00 , G01J2001/4238 , G01R31/26 , H03K19/094 , H03K19/14
摘要： PICA test circuits are shown that include a first transistor and a second transistor laid out drain-to-drain, such that a gap between respective drain regions of the first and second transistors has a minimum size allowed by a given fabrication technology.
摘要翻译：示出了PICA测试电路，其包括第一晶体管和布置为漏极到漏极的第二晶体管，使得第一和第二晶体管的各个漏极区之间的间隙具有由给定制造技术允许的最小尺寸。

5. 发明授权

US5654579A Electronic component 失效
标题翻译：电子元器件
公开(公告)号：US5654579A
公开(公告)日：1997-08-05
申请号：US424451
申请日：1995-06-16
申请人： Norbert Bauer , Friedrich Bobel , Hermann Haken
发明人： Norbert Bauer , Friedrich Bobel , Hermann Haken
IPC分类号： H01L27/14 , G01J1/44 , G01R19/165 , G06F15/18 , G06G7/12 , G06N3/063 , H01L27/15 , H01L29/36 , H01L29/66 , H01L33/00 , H01L35/00 , H01L41/08 , H01S5/00 , H01S5/026 , H01L45/00 , G06G7/00 , H03K19/14 , H03K19/23
CPC分类号： H01L29/66992 , H01L27/15 , H01L29/36
摘要： Described is an electronic component with N input terminals, which admit N input signals, M output terminals, each of which is assigned to one or more input terminals, a component body in which, depending on the input signals, current paths or filaments are created which connect the N input terminals with the M output terminals, wherein, to establish a decision or displacement dynamics, an external quantity applied to the component switches the current flow through the component body between an initial distribution, in which the current densities (j.sub.i) between each input terminal and its assigned output terminal correspond to the input signal admitted at the respective input terminal, and a self-organizing distribution, in which the current flows only between the input terminal admitting the input signal with the highest value and its assigned output terminal.
摘要翻译： PCT No.PCT / DE93 / 01039 Sec。 371日期：1995年6月16日 102（e）日期1995年6月16日PCT提交1993年10月29日PCT公布。公开号WO94 / 10755 日期1994年5月11日描述的是具有N个输入端子的电子部件，其允许N个输入信号，M个输出端子，每个输入端子被分配给一个或多个输入端子，其中根据输入信号，电流路径或者产生将N个输入端子与M个输出端子连接的灯丝，其中，为了建立决定或位移动力学，施加到部件的外部数量在初始分布之间切换通过部件主体的电流，其中电流每个输入端与其分配的输出端之间的密度（ji）对应于在相应输入端允许的输入信号，以及自组织分布，其中电流仅在允许具有最高值的输入信号的输入端之间流动及其分配的输出端子。

6. 发明授权

US5576699A Method and apparatus for transferring information by utilizing electron beam 失效
标题翻译：利用电子束传送信息的方法和装置
公开(公告)号：US5576699A
公开(公告)日：1996-11-19
申请号：US449834
申请日：1995-05-24
申请人： Fumitaka Kan , Kenji Nakamura , Masanori Takenouchi , Naoji Hayakawa , Isamu Shimoda , Masahiko Okunuki
发明人： Fumitaka Kan , Kenji Nakamura , Masanori Takenouchi , Naoji Hayakawa , Isamu Shimoda , Masahiko Okunuki
IPC分类号： G11C7/00 , G11C11/23 , H03K19/14 , H04Q1/00
CPC分类号： H03K19/14 , G11C11/23 , G11C7/005
摘要： In a method for transferring information in a form of electron beam, an electron beam detector detects the electron beam, and emission of the electron beam from a predetermined electron beam source is controlled in accordance with a signal from the detector upon detection of the electron beam. A deflection electrode is also used to deflect the electron beams according to an electric or magnetic field to perform charge shifting, logical additions, logical multiplications, image formation, and the like.
摘要翻译：在以电子束形式传送信息的方法中，电子束检测器检测电子束，并且在检测到电子束时根据来自检测器的信号来控制来自预定电子束源的电子束的发射。偏转电极也用于根据电场或磁场偏转电子束，以执行电荷转移，逻辑加法，逻辑乘法，图像形成等。

7. 发明授权

US5550856A Electro-optical device 失效
标题翻译：电光装置
公开(公告)号：US5550856A
公开(公告)日：1996-08-27
申请号：US416606
申请日：1995-04-04
申请人： Julian Cheng
发明人： Julian Cheng
IPC分类号： G06E1/04 , H01L31/153 , H01S5/026 , H01S5/183 , H01S5/20 , H03K19/14 , H03K19/21 , H01S3/19 , H01S3/10
CPC分类号： H03K19/21 , G06E1/04 , H01L31/153 , H01S5/0261 , H03K19/14 , H01S5/0262 , H01S5/042 , H01S5/18308 , H01S5/2063
摘要： An electro-optical device includes a vertical cavity surface emitting laser, a heterojunction light emitting device and heterojunction phototransistor on a semiconductor substrate. Layers of the heterojunction phototransistor and the heterojunction light-emitting device are electrically and optically coupled so there is regenerative optical and electrical feedback between them. Layers of the heterojunction light-emitting devices are proton implanted to control the feedback. Plural such devices are electrically and optically coupled together to perform logic functions, such as EXCLUSIVE OR, in response to optical signals.
摘要翻译：电光装置包括垂直腔表面发射激光器，异质结发光器件和半导体衬底上的异质结光电晶体管。异质结光电晶体管和异质结发光器件的层电耦合和光耦合，从而在它们之间存在再生光学和电反馈。异质结发光器件的层被质子注入以控制反馈。多个这样的设备电和光耦合在一起以执行响应于光信号的逻辑功能，例如EXCLUSIVE OR。

8. 发明授权

US5448393A Apparatus and method for referencing an optical receiver 失效
标题翻译：用于参考光接收机的装置和方法
公开(公告)号：US5448393A
公开(公告)日：1995-09-05
申请号：US164589
申请日：1993-12-09
申请人： Anthony L. Lentine , David A. B. Miller
发明人： Anthony L. Lentine , David A. B. Miller
IPC分类号： G02F2/00 , H01L27/14 , H01L31/00 , H01L33/00 , H03F3/08 , H03K17/785 , H03K19/14 , H04B10/04 , H04B10/06 , H04B10/14 , H04B10/158 , H04B10/26 , H04B10/28
CPC分类号： H04B10/69 , H03K17/785 , H03K19/14 , H04B10/691
摘要： An optical receiver apparatus and method for receiving optical signals and for generating output signals is disclosed. In particular, a photoconductor is illuminated with a preset beam before an input beam is incident on a detector to reset an input FET. An optical receiver according to the invention controls the voltage swings and the allowed voltages at the input stage, and can be monolithically integrated to allow uniform operation across a semiconductor chip and between circuits on different chips.
摘要翻译：公开了一种用于接收光信号并用于产生输出信号的光接收机装置和方法。特别地，在输入光束入射到检测器上以复位输入FET之前，用预设光束照射光电导体。根据本发明的光接收器控制在输入级的电压摆幅和允许的电压，并且可以单片集成，以允许半导体芯片和不同芯片上的电路之间的均匀操作。

9. 发明授权

US5247473A Method and apparatus for performing a multiple-input optical arithmetic comparison 失效
公开(公告)号：US5247473A
公开(公告)日：1993-09-21
申请号：US764126
申请日：1991-09-24
申请人： Theodore L. Houk , R. Aaron Falk
发明人： Theodore L. Houk , R. Aaron Falk
IPC分类号： G06E1/02 , H03K19/14
CPC分类号： G06E1/02 , H03K19/14
摘要： An optical arithmetic comparator (OAC) is disclosed which is capable of comparing multiple numbers simultaneously, and indicating the common value of the multiple numbers being compared if the numbers are equal. The OAC includes at least two input channels each having a plurality of sources arranged in an identical pattern, the sources being capable of selective activation such that only one source is activated at a time within each of the channels to form a specific spatial light pattern, and a detector array which determines if the specific spatial light pattern indicated the numbers being compared are equal.

10. 发明授权

US5233556A Optoelectronic memory and logic device 失效
标题翻译：光电存储器和逻辑器件
公开(公告)号：US5233556A
公开(公告)日：1993-08-03
申请号：US826727
申请日：1992-01-28
申请人： Kenichi Matsuda , Jun Shibata
发明人： Kenichi Matsuda , Jun Shibata
IPC分类号： G11C11/42 , H03K3/42 , H03K19/14
CPC分类号： G11C11/42 , H03K19/14 , H03K3/42
摘要： An optoelectronic memory and logic device has a function of a reset-set flip-flop (RS-FF) or an exclusive-OR (EOR) gate. The RS-FF includes a first and a second optical inverter circuits. The optical inverter circuit includes a parallel connection of a light emitting device and a phototransistor, and a load resistor connected in series. The phototransistor in the first (second) optical inverter circuit receives the light from the lihgt emitting device in the second (first) optical inverter circuit. The RS-FF has high contrast ratio in case of emitting high output power, and operates stably when the load resistance and the bias voltage are fluctuated. The EOR gate comprises a parallel connection of an adder circuit and a multiplier circuit, and a load resistor connected in series. The adder circuit is a series connection of a light emitting device and a first phototransistor. The multiplier circuit is a series connection of a second phototransistor and a third phototransistor. The first and the second phototransistors receive a first input light, and the first and the third phototransistors receive a second input light. The EOR gate is constituted with five devices, and emits a single output light corresponding to the EOR of two input lights.
摘要翻译：光电存储器和逻辑器件具有复位触发器（RS-FF）或异或（EOR）门的功能。 RS-FF包括第一和第二光反向器电路。光学逆变器电路包括发光器件和光电晶体管的并联连接，以及串联连接的负载电阻器。第一（第二）光逆变器电路中的光电晶体管在第二（第一）光逆变器电路中接收来自发光器件的光。在发射高输出功率的情况下，RS-FF具有高对比度，并且当负载电阻和偏置电压波动时，RS-FF稳定地工作。 EOR门包括加法器电路和乘法器电路的并联连接，以及串联连接的负载电阻器。加法器电路是发光器件和第一光电晶体管的串联连接。乘法器电路是第二光电晶体管和第三光电晶体管的串联连接。第一和第二光电晶体管接收第一输入光，并且第一和第三光电晶体管接收第二输入光。 EOR门由五个装置构成，并且发射对应于两个输入光的EOR的单个输出光。

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