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71. 发明授权

US6119338A Method for manufacturing high-density multilayer printed circuit boards 失效
标题翻译：高密度多层印刷电路板的制造方法
公开(公告)号：US6119338A
公开(公告)日：2000-09-19
申请号：US44969
申请日：1998-03-19
申请人： Tsung-Hsiung Wang , Man-Lin Chen , Chuang-Shin Chiou , Ming-Shun Chan , Pei-Wen Ding
发明人： Tsung-Hsiung Wang , Man-Lin Chen , Chuang-Shin Chiou , Ming-Shun Chan , Pei-Wen Ding
IPC分类号： H05K3/00 , H05K3/04 , H05K3/40 , H05K3/42 , H05K3/46 , H01K3/10
CPC分类号： H05K3/421 , H05K3/4069 , H05K3/4602 , H05K2201/0347 , H05K2201/0355 , H05K2201/0394 , H05K2201/09509 , H05K2201/0959 , H05K2201/096 , H05K2203/0554 , H05K2203/085 , H05K3/0035 , H05K3/0094 , H05K3/045 , H05K3/4644 , Y10T29/49126 , Y10T29/4913 , Y10T29/49156 , Y10T29/49165
摘要： A method for making high-density multilayer printed circuit boards is disclosed. It includes the steps of: (a) forming a pair of first conductive layers on top and bottom sides of a dielectric substrate; (b) forming first via holes through one of the first electrically conductive layers; (c) forming a blind hole through the dielectric substrate using a conformal laser drilling technique and filling the blind hole with an electrically conductive material; (d) forming a circuit pattern from the first electrically conductive layer; (e) forming a first electrically insulating layer on the first electrically conductive layer; (f) forming second via holes through the first electrically insulating layer using a non-conformal laser drilling technique; (g) forming a second electrically conductive layer covering the top surface of the circuit pattern, the first electrically insulating layer, and the side surface of the second via holes by electroplating; (h) forming a second electrically insulating layer on the first electrically conductive layer and filling the second via hole with the same electrically insulating material; (i) removing the second electrically insulating layer and the second electrically conductive layer above the second via hole; (j) forming a third electrically conductive layer on the first electrically insulating layer, wherein the third electrically conductive layer is in contact with the top edges of the second electrically conductive layer remaining on the cylindrical surface of the second via; (k) forming another circuit pattern on the third electrically conductive layer. Steps(e) through (k) can be repeated for more circuit patterns.
摘要翻译：公开了一种制造高密度多层印刷电路板的方法。它包括以下步骤：（a）在电介质基片的顶面和底面上形成一对第一导电层; （b）通过所述第一导电层之一形成第一通孔; （c）使用共形激光钻孔技术通过介电基片形成盲孔，并用导电材料填充盲孔; （d）从第一导电层形成电路图案; （e）在第一导电层上形成第一电绝缘层; （f）使用非共形激光钻孔技术通过所述第一电绝缘层形成第二通孔; （g）通过电镀形成覆盖电路图案的顶表面，第一电绝缘层和第二通孔的侧表面的第二导电层; （h）在所述第一导电层上形成第二电绝缘层并用相同的电绝缘材料填充所述第二通孔; （i）在所述第二通孔上方去除所述第二电绝缘层和所述第二导电层; （j）在所述第一电绝缘层上形成第三导电层，其中所述第三导电层与残留在所述第二通孔的圆柱形表面上的所述第二导电层的顶部边缘接触; （k）在第三导电层上形成另一个电路图案。可以重复步骤（e）至（k）以获得更多的电路图案。

72. 发明授权

US5968333A Method of electroplating a copper or copper alloy interconnect 失效
标题翻译：铜或铜合金互连电镀方法
公开(公告)号：US5968333A
公开(公告)日：1999-10-19
申请号：US55876
申请日：1998-04-07
申请人： Takeshi Nogami , Valery Dubin , Robin Cheung
发明人： Takeshi Nogami , Valery Dubin , Robin Cheung
IPC分类号： C23C14/02 , C23C28/02 , C25D7/12 , H01L21/288 , H01L21/768 , H05K3/04 , H05K3/10 , H05K3/38 , H05K3/42 , C25D5/02 , C25D5/56
CPC分类号： H01L21/76873 , C23C28/023 , C25D7/123 , H01L21/2885 , H01L21/76841 , H01L21/76843 , H01L21/76877 , H05K3/423 , H05K2201/0376 , H05K2201/09563 , H05K2201/09845 , H05K3/045 , H05K3/107 , H05K3/388
摘要： Copper or a copper alloy is electroplated to fill via/contact holes and/or trenches in a dielectric layer. A barrier layer is initially deposited on the dielectric layer lining the hole/trench. A thin conformal layer of copper or a copper alloy is sputter deposited on the barrier layer outside the hole/trench. Copper or a copper alloy is then electroplated on the conformal copper or copper alloy layer and filling the hole/trench. During electroplating, the barrier layer functions as a seed layer within the hole/trench while the sputter deposited conformal copper or copper alloy layer enhances the flow of electrons from the wafer edge inwardly to provide a favorable deposition rate.
摘要翻译：电镀铜或铜合金以填充电介质层中的通孔/接触孔和/或沟槽。最初在衬在孔/沟上的电介质层上沉积阻挡层。铜或铜合金的薄保形层溅射沉积在孔/沟槽外的势垒层上。然后将铜或铜合金电镀在保形铜或铜合金层上并填充孔/沟槽。在电镀期间，阻挡层用作孔/沟内的种子层，而溅射沉积的共形铜或铜合金层可以使电子从晶片边缘向内流动，从而提供有利的沉积速率。

73. 发明授权

US5950305A Environmentally desirable method of manufacturing printed circuits 失效
标题翻译：环保制造印刷电路的方法
公开(公告)号：US5950305A
公开(公告)日：1999-09-14
申请号：US982983
申请日：1997-12-02
申请人： Joseph A. Roberts
发明人： Joseph A. Roberts
IPC分类号： H05K3/04 , H05K3/46 , H01K3/22
CPC分类号： H05K3/045 , H05K2201/0195 , H05K2201/0355 , H05K2201/0382 , H05K2203/025 , H05K2203/063 , H05K3/4647 , Y10T29/49117 , Y10T29/49155 , Y10T29/49158
摘要： Methods of facilitating commercial production of supported conductive networks without the use of hazardous chemicals including using heat flowable adhesive in the formation of the networks, providing contact pads exposed through a dielectric substrate which supports a conductive network, using the thickness of a conductor supporting dielectric layer to space the conductors and providing conductor and waste material cross-sections trapezoidal in shape in a non-planar pattern during manufacture of the networks.
摘要翻译：促进支撑导电网络的商业生产的方法，不使用危险化学品，包括在网络形成中使用热可流动的粘合剂，通过支撑介质层的导体的厚度提供通过介电基板暴露的接触焊盘，以在网络的制造过程中间隔导体并且以非平面图案形状提供梯形形状的导体和废料横截面。

74. 发明授权

US5932280A Printed circuit board having printed resistors and method of making printed resistors on a printed circuit board using thermal transfer techniques 失效
标题翻译：具有印刷电阻的印刷电路板和使用热转印技术在印刷电路板上制造印刷电阻器的方法
公开(公告)号：US5932280A
公开(公告)日：1999-08-03
申请号：US574736
申请日：1995-12-19
申请人： Joseph D. Roth
发明人： Joseph D. Roth
IPC分类号： H01C17/075 , H05K1/09 , H05K1/16 , H05K3/04 , H05K3/20 , B05D5/12
CPC分类号： H05K3/046 , H01C17/075 , H05K1/167 , H05K1/095 , H05K2201/0323 , H05K2203/0528 , H05K2203/1105 , H05K3/207
摘要： Resistors for a printed circuit board and methods for making are provided using thermal transfer techniques to transfer coating material having some degree of electrical conductivity from a thermal transfer ribbon to the printed circuit board. Parts of the coating material transferred to the printed circuit board form resistors having varying resistances based on the geometry of the material transferred. Multiple ribbons having coatings with varying degrees of electrical conductivity may also be used to provide greater variances in resistor values obtainable.
摘要翻译：使用热转印技术提供用于印刷电路板的电阻器和制造方法，以将具有一定程度的导电性的涂层材料从热转印带转印到印刷电路板。转移到印刷电路板的涂层材料的部分基于所传送的材料的几何形状形成具有变化的电阻的电阻器。具有不同程度导电性的涂层的多个带也可用于提供可获得的电阻值的较大变化。

75. 发明授权

US5928767A Conductive film composite 失效
标题翻译：导电膜复合材料
公开(公告)号：US5928767A
公开(公告)日：1999-07-27
申请号：US474929
申请日：1995-06-07
申请人： William F. Gebhardt , Rocco Papalia
发明人： William F. Gebhardt , Rocco Papalia
IPC分类号： H05K1/03 , B32B15/08 , H05K3/04 , H05K3/10 , H05K3/38 , B32B3/00
CPC分类号： H05K3/045 , B32B15/08 , H05K3/386 , H05K2201/0133 , H05K2201/0355 , H05K2201/0382 , H05K2203/0108 , H05K2203/1545 , H05K3/107 , Y10S428/901 , Y10T428/24917
摘要： A thin film printed board precursor containing a laminate of a dielectric thermosetting resin film layer and a heat and electrically conductive metal foil layer in direct adhesive bonding with a side of the resin film, optionally containing a supporting layer comprising one or more of fiber, fabric and thermoplastic polymer in contact with the other side of the resin layer, wherein the dielectric thermosetting resin layer has an unimpeded thickness that is at least equal to that of the foil layer bonded to it.
摘要翻译：一种薄膜印刷电路板前体，其包含介电热固性树脂膜层和导热金属箔层的层叠体，其与树脂膜的一侧直接粘接，任选地包含一个或多个纤维，织物和与树脂层的另一侧接触的热塑性聚合物，其中介电热固性树脂层具有至少等于与其结合的箔层的厚度的无阻碍的厚度。

76. 发明授权

US5925502A Method of metallizing a quartz resonator 失效
标题翻译：金属化石英谐振器的方法
公开(公告)号：US5925502A
公开(公告)日：1999-07-20
申请号：US835062
申请日：1997-04-03
申请人： John R. Vig , Mary Hendrickson , Sally M. Laffey
发明人： John R. Vig , Mary Hendrickson , Sally M. Laffey
IPC分类号： G03F7/00 , H03H3/02 , H05K3/04
CPC分类号： H03H3/02 , G03F7/00 , H05K3/048
摘要： An improved quartz resonator is obtaind using a mask which is kept in intte contact with the quartz substrate during the electrode metallization.
摘要翻译：使用在电极金属化期间与石英衬底保持紧密接触的掩模获得改进的石英谐振器。

77. 发明授权

US5891513A Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications 失效
标题翻译：通过用于ULSI应用的CU接触位移，在阻挡层上沉积化学镀
公开(公告)号：US5891513A
公开(公告)日：1999-04-06
申请号：US587262
申请日：1996-01-16
申请人： Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting , Bin Zhao , Prahalad K. Vasudev
发明人： Valery M. Dubin , Yosef Shacham-Diamand , Chiu H. Ting , Bin Zhao , Prahalad K. Vasudev
IPC分类号： C23C18/16 , H01L21/288 , H01L21/768 , H01L23/532 , H05K3/04 , H05K3/38 , H05K3/42 , H05K3/46 , B05D5/12
CPC分类号： H01L21/76843 , C23C18/1603 , C23C18/1651 , C23C18/1689 , C23C18/1831 , C23C18/1879 , C23C18/54 , H01L21/288 , H01L21/76807 , H01L21/76874 , H01L21/76877 , H01L23/53238 , H05K3/388 , H05K3/465 , H01L2924/0002 , H05K2201/09563 , H05K2203/072 , H05K2203/0733 , H05K3/045 , H05K3/422 , H05K3/4661 , Y10S977/892
摘要： A method of utilizing electroless copper deposition to form interconnects on a semiconductor wafer. Once a via or a trench is formed in a dielectric layer, a titanium nitride (TiN) or tantalum (Ta) barrier layer is blanket deposited. Then, a contact displacement technique is used to form a thin activation seed layer of copper on the barrier layer. An electroless deposition technique is then used to auto-catalytically deposit copper on the activated barrier layer. The electroless copper deposition continues until the via/trench is filled. Subsequently, the surface is polished by an application of chemical-mechanical polishing (CMP) to remove excess copper and barrier material from the surface, so that the only copper and barrier material remaining are in the via/trench openings. Then an overlying silicon nitride (SiN) layer is formed above the exposed copper in order to form a dielectric barrier layer. The copper interconnect is fully encapsulated from the adjacent material by the TiN (or Ta) and the SiN layers.
摘要翻译：一种利用无电铜沉积在半导体晶片上形成互连的方法。一旦在电介质层中形成通孔或沟槽，则氮化钛（TiN）或钽（Ta）阻挡层被覆盖沉积。然后，使用接触位移技术在阻挡层上形成铜的薄的活化种子层。然后使用无电沉积技术在活化的阻挡层上自动催化沉积铜。继续进行化学镀铜沉积，直到通孔/沟槽被填充。随后，通过施加化学机械抛光（CMP）来抛光表面以从表面去除多余的铜和阻挡材料，使得剩余的唯一的铜和阻挡材料在通孔/沟槽开口中。然后，在暴露的铜上方形成覆盖氮化硅（SiN）层，以形成电介质阻挡层。铜互连通过TiN（或Ta）和SiN层从相邻材料完全封装。

78. 发明授权

US5869787A Electrically conductive projections 失效
标题翻译：导电突起
公开(公告)号：US5869787A
公开(公告)日：1999-02-09
申请号：US846683
申请日：1997-04-30
申请人： Salman Akram
发明人： Salman Akram
IPC分类号： G01R1/067 , H01L21/768 , H01L23/13 , H01R12/55 , H05K3/04 , H05K3/06 , H05K3/40 , H05K1/00
CPC分类号： G01R1/06738 , G01R1/06761 , H01L21/768 , H01L21/76838 , H01L21/76895 , H01L23/13 , G01R1/06744 , H01L2924/00013 , H01L2924/0002 , H05K3/048 , H05K3/064 , H05K3/4007 , Y10S438/902
摘要： An electrically conductive apparatus includes, a) an electrically non-conducting substrate, the substrate having a base surface and an adjacent elevated surface, the elevated surface being spaced from the base surface by a first distance thereby defining a step having a step wall; b) a capping layer of first electrically conductive material coating the elevated surface only portions of the step wall, the capping layer having outer top and outer side portions; and c) a conductive trace of second electrically conductive material which is different from the first electrically conductive material; the conductive trace overlying the substrate, portions of the step wall not covered by the capping layer, and the outer side portions of the capping layer. Methods are disclosed for producing such a construction, for forming an electrically conductive projection outwardly extending from a substrate, and for providing an electrical interconnection between adjacent different elevation areas on a substrate.
摘要翻译：导电装置包括：a）非导电衬底，所述衬底具有基底表面和相邻的升高表面，所述升高表面与所述基底表面隔开第一距离，从而限定具有台阶壁的台阶; b）第一导电材料的覆盖层，仅覆盖所述台阶壁的仅升高的表面，所述封盖层具有外顶部和外侧部分; 以及c）与所述第一导电材料不同的第二导电材料的导电迹线; 覆盖衬底的导电迹线，阶梯壁的未被覆盖层覆盖的部分以及覆盖层的外侧部分。公开了用于制造这种结构的方法，用于形成从衬底向外延伸的导电突起，并且用于在衬底上的相邻不同高度区域之间提供电互连。

79. 发明授权

US5860212A Method of coating a conductive substance on a transparent electrode formed on a substrate and method of mounting a semiconductor device or film substrate on the substrate 失效
标题翻译：在基板上形成的透明电极上涂布导电物质的方法以及将半导体装置或薄膜基板安装在基板上的方法
公开(公告)号：US5860212A
公开(公告)日：1999-01-19
申请号：US408319
申请日：1995-03-22
申请人： Tsutomu Matsuhira
发明人： Tsutomu Matsuhira
IPC分类号： G02F1/1345 , H05K3/04 , H05K3/24 , H05K3/32 , H05K3/36 , H05K3/34
CPC分类号： H05K3/245 , H05K3/321 , H05K2201/0326 , H05K2203/0338 , H05K3/04 , H05K3/244 , H05K3/361 , Y10T29/49144
摘要： A method of coating a conductive substance on a transparent electrode disposed on a substrate comprises disposing a resin containing the conductive substance over the surface of the substrate, and rubbing and pressing the resin over the surface of the substrate with a pressing shaft to coat a layer of the resin on the transparent electrode. A method of mounting a semiconductor device or the film substrate on the substrate having the transparent electrode coated with the resin layer containing the conductive substance comprises connecting a terminal portion of the semiconductor device or film substrate to the transparent electrode through the resin layer.
摘要翻译：在设置在基板上的透明电极上涂布导电性物质的方法包括将含有导电性物质的树脂设置在基板的表面上，并用压轴将树脂摩擦并压在基板的表面上以覆盖层的透明电极上的树脂。将半导体器件或薄膜基板安装在具有涂覆有包含导电物质的树脂层的透明电极的基板上的方法包括通过树脂层将半导体器件或薄膜基板的端子部分连接到透明电极。

80. 发明授权

US5858496A Optically transparent article with embedded mesh 失效
标题翻译：光学透明制品，嵌入式网眼
公开(公告)号：US5858496A
公开(公告)日：1999-01-12
申请号：US941475
申请日：1997-09-30
申请人： Donald Fisher , Charles Warner
发明人： Donald Fisher , Charles Warner
IPC分类号： H05B3/86 , H05K1/00 , H05K1/03 , H05K3/00 , H05K3/04 , H05K3/10 , H05K9/00 , G02F1/01
CPC分类号： H05K9/0039 , H05B3/86 , H05K3/107 , H05B2203/017 , H05K1/0289 , H05K1/0306 , H05K2201/0108 , H05K2201/09036 , H05K3/0029 , H05K3/048 , Y10T29/49155 , Y10T428/16 , Y10T428/162 , Y10T428/23 , Y10T428/239 , Y10T428/24777 , Y10T428/2481 , Y10T428/249921
摘要： An optically transparent article is prepared from an optically transparent first piece and an optically transparent second piece. A channel pattern is scribed into a surface of the first piece to a preselected depth. A metallic stripe pattern is deposited into the channel pattern, with the thickness of the metallic stripe pattern being less than the depth of the channel pattern. The second piece is placed over the first piece and sealed thereto at a peripheral boundary such that the second piece does not contact the metallic stripe pattern. A bus connection is optionally made to the metallic stripe, preferably from the periphery of either the first or second piece.
摘要翻译：光学透明制品由光学透明的第一片和光学透明的第二片制成。将通道图案划刻到第一件的表面中至预选深度。金属条纹图案沉积到通道图案中，金属条纹图案的厚度小于通道图案的深度。将第二件放置在第一件上并在周边边界密封，使得第二件不接触金属条纹图案。总线连接可选地制成金属条，优选地从第一或第二片的周边。

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