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    • 9. 发明授权
    • Integrated circuit device having internal fast clock source
    • 具有内部快速时钟源的集成电路器件
    • US5598447A
    • 1997-01-28
    • US60733
    • 1993-05-10
    • Akira Usui
    • Akira Usui
    • G06F1/08G06F1/10G06F1/12H01L27/02H03L7/06H03L7/099H03L7/183H01L27/00H03D3/24
    • H03L7/183H01L27/0207H03L7/0995
    • An integrated circuit device is comprised of an input interface, a PLL unit, a processing unit and an output interface. The input interface operates in response to an external clock signal for sequentially receiving input data in synchronization with an external synchro signal. The PLL unit includes an internal clock source operative in phase-locked manner according to the external synchro signal for generating an internal clock signal which is faster than the external clock signal. The processing unit operates in response to the internal clock signal for sequentially processing the input data. The output interface operates in response to the external synchro signal for sequentially outputting the processed data in synchronization with the external synchro signal.
    • 集成电路装置包括输入接口,PLL单元,处理单元和输出接口。 输入接口响应于外部时钟信号而工作,用于与外部同步信号同步地顺序地接收输入数据。 PLL单元包括根据外部同步信号以锁相方式操作的内部时钟源,用于产生比外部时钟信号快的内部时钟信号。 处理单元响应于内部时钟信号进行操作,以顺序处理输入数据。 输出接口响应于外部同步信号而工作,以与外部同步信号同步地顺序地输出处理的数据。