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1. 发明授权

US6031388A Postcharged interconnection speed-up circuit 失效
标题翻译：后置互联加速电路
公开(公告)号：US6031388A
公开(公告)日：2000-02-29
申请号：US896614
申请日：1997-07-18
申请人： Ivo Dobbelaere
发明人： Ivo Dobbelaere
IPC分类号： H03K19/017 , H03K19/01
CPC分类号： H03K19/01721
摘要： A circuit style, which may be employed in fast, area-efficient, flexible programmable interconnect architectures, or in logic circuits, is disclosed. In one embodiment, a plurality of postcharged speed-up circuits, each having a single network node, is connected to the intermediate nodes of a programmable interconnect architecture. Each speed-up circuit monitors the logic level on the network node. When a circuit detects a substantial change in logic level, away from the stand-by level, it temporarily enforces that change by connecting its network node to the signaling logic level. Thus, on each node, a low-impedance enhancement of the signal driving the node temporarily appears. This causes the potential on neighboring nodes, connected through conducting programmable switches, to change towards the signaling level, and their speed-up circuits in turn temporarily enforce the new level. After the temporary enforcement of the signaling level, each speed-up circuit forces its network node back to the stand-by level, for a predetermined period of time. Thus, a forced pulse away from the stand-by logic level towards the signaling level on a node quickly propagates to its connected nodes.
摘要翻译：公开了可用于快速，区域高效，灵活的可编程互连体系结构或逻辑电路中的电路方式。在一个实施例中，每个具有单个网络节点的多个后充电加速电路连接到可编程互连架构的中间节点。每个加速电路监视网络节点上的逻辑电平。当电路检测到逻辑电平的显着变化时，远离待机电平，通过将其网络节点连接到信号逻辑电平来暂时实现该改变。因此，在每个节点上，暂时出现驱动节点的信号的低阻抗增强。这导致通过可编程开关连接的相邻节点上的电位朝向信号电平变化，并且它们的加速电路又临时地执行新的电平。在信令级别的临时实施之后，每个加速电路迫使其网络节点返回待机级别一段预定的时间。因此，远离待机逻辑电平的强制脉冲朝向节点上的信号电平快速传播到其连接的节点。

2. 发明申请

US20090072858A1 HETEROGENEOUS CONFIGURABLE INTEGRATED CIRCUIT 有权
标题翻译：异构可配置集成电路
公开(公告)号：US20090072858A1
公开(公告)日：2009-03-19
申请号：US11855666
申请日：2007-09-14
申请人： Godfrey P. D'Souza , Douglas Laird , Malcolm J. Wing , Colin N. Murphy , Dana L. How , Robert Yu , Jay B. Patel , Ivo Dobbelaere , Jason Golbus , Suresh Subramaniam , Mukunda Krishnappa , Pohrong R. Chu , Dave Trossen , Kevin James
发明人： Godfrey P. D'Souza , Douglas Laird , Malcolm J. Wing , Colin N. Murphy , Dana L. How , Robert Yu , Jay B. Patel , Ivo Dobbelaere , Jason Golbus , Suresh Subramaniam , Mukunda Krishnappa , Pohrong R. Chu , Dave Trossen , Kevin James
IPC分类号： H03K19/173
CPC分类号： H03K19/177
摘要： A system including a plurality of programmable logic blocks, a plurality of special-purpose blocks, and a configurable high-speed mesh interconnect fabric operatively connecting the plurality of programmable logic blocks and the plurality of special-purpose blocks, where the configurable high-speed mesh interconnect fabric is configured to implement a plurality of interconnect pipeline buses spanning across the system.
摘要翻译：一种包括多个可编程逻辑块，多个特殊用途块和可操作地连接多个可编程逻辑块和多个专用块的可配置高速网状互连结构的系统，其中可配置的高速网状互连结构被配置为实现横跨系统的多个互连管线总线。

3. 发明授权

US07557605B2 Heterogeneous configurable integrated circuit 有权
标题翻译：异构可配置集成电路
公开(公告)号：US07557605B2
公开(公告)日：2009-07-07
申请号：US11855666
申请日：2007-09-14
申请人： Godfrey P. D'Souza , Douglas Laird , Malcolm J. Wing , Colin N. Murphy , Dana L. How , Robert Yu , Jay B. Patel , Ivo Dobbelaere , Jason Golbus , Suresh Subramaniam , Mukunda Krishnappa , Pohrong R. Chu , Dave Trossen , Kevin James
发明人： Godfrey P. D'Souza , Douglas Laird , Malcolm J. Wing , Colin N. Murphy , Dana L. How , Robert Yu , Jay B. Patel , Ivo Dobbelaere , Jason Golbus , Suresh Subramaniam , Mukunda Krishnappa , Pohrong R. Chu , Dave Trossen , Kevin James
IPC分类号： H03K19/173
CPC分类号： H03K19/177
摘要： A system including a plurality of programmable logic blocks, a plurality of special-purpose blocks, and a configurable high-speed mesh interconnect fabric operatively connecting the plurality of programmable logic blocks and the plurality of special-purpose blocks, where the configurable high-speed mesh interconnect fabric is configured to implement a plurality of interconnect pipeline buses spanning across the system.
摘要翻译：一种包括多个可编程逻辑块，多个特殊用途块和可操作地连接多个可编程逻辑块和多个专用块的可配置高速网状互连结构的系统，其中可配置的高速网状互连结构被配置为实现横跨系统的多个互连管线总线。

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