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1. 发明申请

US20090194852A1 SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US20090194852A1
公开(公告)日：2009-08-06
申请号：US12336407
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/50
CPC分类号： H01L24/97 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49805 , H01L23/552 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2221/68331 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/16152 , H01L2924/166 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) a grounding element disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface; (4) a package body disposed adjacent to the upper surface and covering the semiconductor device and the grounding element; and (5) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a lateral surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The grounding element corresponds to a remnant of a conductive bump, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）接地元件，其设置在所述基板单元的周边附近并从所述基板单元的上表面向上延伸; （3）邻近上表面设置的半导体器件; （4）与所述上表面相邻并且覆盖所述半导体器件和所述接地元件的封装体; 和（5）邻近封装体的外表面设置并电连接到接地元件的侧表面的EMI屏蔽。封装主体的侧表面基本上与衬底单元的侧表面对准。接地元件对应于导电凸块的残余物，并且提供了入射到EMI屏蔽上的接地电磁辐射的电路径。

2. 发明授权

US08022511B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08022511B2
公开(公告)日：2011-09-20
申请号：US12336407
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552
CPC分类号： H01L24/97 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49805 , H01L23/552 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2221/68331 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/16152 , H01L2924/166 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) a grounding element disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface; (4) a package body disposed adjacent to the upper surface and covering the semiconductor device and the grounding element; and (5) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a lateral surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The grounding element corresponds to a remnant of a conductive bump, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）接地元件，其设置在所述基板单元的周边附近并从所述基板单元的上表面向上延伸; （3）邻近上表面设置的半导体器件; （4）与所述上表面相邻并且覆盖所述半导体器件和所述接地元件的封装体; 和（5）邻近封装体的外表面设置并电连接到接地元件的侧表面的EMI屏蔽。封装主体的侧表面基本上与衬底单元的侧表面对准。接地元件对应于导电凸块的残余物，并且提供了入射到EMI屏蔽上的接地电磁辐射的电路径。

3. 发明授权

US08350367B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08350367B2
公开(公告)日：2013-01-08
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/56
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。封装主体的侧表面基本上与衬底单元的侧表面对准，并且接地元件的连接表面邻近衬底单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

4. 发明申请

US20090194851A1 SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US20090194851A1
公开(公告)日：2009-08-06
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/50
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of tile package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。瓦片封装主体的侧表面基本上与基板单元的侧表面对准，并且接地元件的连接表面邻近基板单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

5. 发明授权

US08569808B1 Temperature stabilitized MEMS 有权
标题翻译：温度稳定的MEMS
公开(公告)号：US08569808B1
公开(公告)日：2013-10-29
申请号：US13441134
申请日：2012-04-06
申请人： Tung-Tsun Chen , Chia-Hua Chu , Chung-Hsien Lin , Jui-Cheng Huang
发明人： Tung-Tsun Chen , Chia-Hua Chu , Chung-Hsien Lin , Jui-Cheng Huang
IPC分类号： H01L29/66
CPC分类号： H01L23/34 , B81B7/0096 , B81B2201/0278 , B81C1/0023 , H01L23/345 , H01L27/0629 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.
摘要翻译：具有温度控制系统的半导体器件。该装置的实施例可以包括包括具有专用第一温度控制回路的第一加热器和包括具有专用第二温度控制回路的第二加热器的CMOS芯片的MEMS芯片。每个控制回路可以具有用于控制每个加热器的热输出的专用温度传感器。第一加热器和传感器靠近MEMS芯片中的MEMS器件设置，用于直接加热MEMS芯片。 MEMS芯片和CMOS芯片的温度可以通过温度控制回路彼此独立控制。

6. 发明授权

US06911927B2 Over-sampling digital-to-analog converter with variable sampling frequencies 有权
标题翻译：具有可变采样频率的过采样数模转换器
公开(公告)号：US06911927B2
公开(公告)日：2005-06-28
申请号：US10310323
申请日：2002-12-05
申请人： Wen-Chi Wang , Shih-Yu Ku , Jui-Cheng Huang , Yi-Shu Chang
发明人： Wen-Chi Wang , Shih-Yu Ku , Jui-Cheng Huang , Yi-Shu Chang
IPC分类号： H03M3/00
CPC分类号： H03M3/50
摘要： The present invention offers an over-sampling digital-to-analog converter with variable sampling frequencies to process input signals of variable sampling frequencies. The over-sampling digital-to-analog converter comprises an expander, which expands said input signals with a fixed rate of M to produce over-sampling signals; a digital low-pass filter, which filters out high-frequency ingredients of over-sampling signals and then outputs data with a first rate; a data buffer, which receives the outputted data by said digital low-pass filter with the first rate and outputs the data with a second rate; a modulator, which reads data in said data buffer with the second rate and modulates the data; a digital-to-analog converter, which converts the modulated data to analog signals; and an analog low-pass filter, which filters out high-frequency ingredients of said analog signals for producing output signals. No matter how the sampling frequency of the input signals is, due to reading rates of the modulator are the same, the over-sampling digital-to-analog converter ensures that noise is mostly distributed in the high-frequency band.
摘要翻译：本发明提供具有可变采样频率的过采样数模转换器来处理可变采样频率的输入信号。过采样数模转换器包括扩展器，其以固定速率M扩展所述输入信号以产生过采样信号; 数字低通滤波器，滤除过采样信号的高频成分，然后以第一速率输出数据; 数据缓冲器，其以所述第一速率由所述数字低通滤波器接收输出的数据，并以第二速率输出数据; 调制器，以第二速率读取所述数据缓冲器中的数据并调制数据; 数模转换器，其将调制数据转换为模拟信号; 以及模拟低通滤波器，其滤除所述模拟信号的高频成分以产生输出信号。无论输入信号的采样频率如何，由于调制器的读取速率相同，过采样数模转换器可确保噪声主要分布在高频段。

7. 发明授权

US08884797B2 Systems and methods providing active and passive charge sharing in a digital to analog converter 有权
标题翻译：在数模转换器中提供有源和无源电荷共享的系统和方法
公开(公告)号：US08884797B2
公开(公告)日：2014-11-11
申请号：US13035444
申请日：2011-02-25
申请人： Yung-Chow Peng , Jui-Cheng Huang , Ching-Ho Chang , Nang Ping Tu
发明人： Yung-Chow Peng , Jui-Cheng Huang , Ching-Ho Chang , Nang Ping Tu
IPC分类号： H03M1/66 , H03M1/68 , G09G3/36 , H03M1/80
CPC分类号： H03M1/68 , G09G3/3688 , G09G2300/023 , G09G2310/027 , G09G2330/023 , H03M1/804
摘要： A method for converting a multi-bit digital value to an analog value. The method includes, in a first conversion cycle, converting a first set of digital bits to a first analog voltage using passive charge-sharing. The method also includes, in a second conversion cycle, converting a second set of digital bits to a second analog voltage added to the first analog voltage using active charge-sharing. The first set of digital bits and the second set of digital bits are different bits of the multi-bit digital value.
摘要翻译：一种用于将多位数字值转换为模拟值的方法。该方法包括在第一转换周期中，使用无源电荷共享将第一组数字位转换为第一模拟电压。该方法还包括在第二转换周期中，使用有源电荷共享将第二组数字位转换为添加到第一模拟电压的第二模拟电压。第一组数字位和第二组数字位是多位数字值的不同位。

8. 发明申请

US20140092939A1 Thermal Sensor with Second-Order Temperature Curvature Correction 有权
标题翻译：具有二阶温度曲率校正的热传感器
公开(公告)号：US20140092939A1
公开(公告)日：2014-04-03
申请号：US13632498
申请日：2012-10-01
申请人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
发明人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
IPC分类号： G01K7/01 , H01L23/544
CPC分类号： G01K7/01 , G01K15/005
摘要： Some embodiments of the present disclosure relate to a stacked integrated chip structure having a thermal sensor that detects a temperature of one or a plurality of integrated chips. In some embodiments, the stacked integrated chip structure has a main integrated chip and a secondary integrated chip located on an interposer wafer. The main integrated chip has a reference voltage source that generates a bias current. The secondary integrated chip has a second thermal diode that receives the bias current and based thereupon generates a second thermal sensed voltage and a second reference voltage that is proportional to a temperature of the secondary integrated chip. A digital thermal sensor within the main integrated chip determines a temperature of the secondary integrated chip based upon as comparison of the second thermal sensed voltage and the reference voltage.
摘要翻译：本公开的一些实施例涉及具有检测一个或多个集成芯片的温度的热传感器的堆叠集成芯片结构。在一些实施例中，堆叠集成芯片结构具有位于插入器晶片上的主集成芯片和次集成芯片。主集成芯片具有产生偏置电流的参考电压源。次级集成芯片具有接收偏置电流的第二热二极管，并且基于此产生第二热感测电压和与次级集成芯片的温度成比例的第二参考电压。基于与第二热感测电压和参考电压的比较，主集成芯片内的数字热传感器确定二次集成芯片的温度。

9. 发明授权

US09383264B2 Small area high performance cell-based thermal diode 有权
标题翻译：小面积高性能基于电池的热二极管
公开(公告)号：US09383264B2
公开(公告)日：2016-07-05
申请号：US13428549
申请日：2012-03-23
申请人： Yung-Chow Peng , Ching-Ho Chang , Jui-Cheng Huang
发明人： Yung-Chow Peng , Ching-Ho Chang , Jui-Cheng Huang
IPC分类号： G01K7/00 , G01K7/01
CPC分类号： G01K7/01 , Y10T307/76
摘要： A thermal sensing system includes a circuit having a layout including standard cells arranged in rows and columns. First and second current sources provide first and second currents, respectively. The thermal sensing system includes thermal sensing units, first and second switching modules, and an analog to digital converter (ADC). Each thermal sensing unit is configured to provide a voltage drop dependent on a temperature at that thermal sensing unit. The first switching module is configured to select one of the thermal sensing units. The second switching module includes at least one switch controllable by a control signal. The at least one switch is configured to selectively couple the thermal sensing units, based on the control signal, to one of the first and second current sources, via the first switching module. The ADC is configured to convert an analog voltage, provided by the selected thermal sensing unit, to a digital value.
摘要翻译：热感测系统包括具有布置成行和列的标准单元的布局的电路。第一和第二电流源分别提供第一和第二电流。热感测系统包括热敏单元，第一和第二开关模块以及模数转换器（ADC）。每个热敏单元被配置成提供取决于该热感测单元处的温度的电压降。第一开关模块被配置为选择一个热感测单元。第二开关模块包括可由控制信号控制的至少一个开关。所述至少一个开关被配置为经由所述第一开关模块将所述热感测单元基于所述控制信号选择性地耦合到所述第一和第二电流源之一。 ADC配置为将所选热敏单元提供的模拟电压转换为数字值。

10. 发明授权

US09016939B2 Thermal sensor with second-order temperature curvature correction 有权
标题翻译：具有二阶温度曲率校正的热传感器
公开(公告)号：US09016939B2
公开(公告)日：2015-04-28
申请号：US13632498
申请日：2012-10-01
申请人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
发明人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
IPC分类号： G01K7/00 , G01K7/01
CPC分类号： G01K7/01 , G01K15/005
摘要： Some embodiments of the present disclosure relate to a stacked integrated chip structure having a thermal sensor that detects a temperature of one or a plurality of integrated chips. In some embodiments, the stacked integrated chip structure has a main integrated chip and a secondary integrated chip located on an interposer wafer. The main integrated chip has a reference voltage source that generates a bias current. The secondary integrated chip has a second thermal diode that receives the bias current and based thereupon generates a second thermal sensed voltage and a second reference voltage that is proportional to a temperature of the secondary integrated chip. A digital thermal sensor within the main integrated chip determines a temperature of the secondary integrated chip based upon as comparison of the second thermal sensed voltage and the reference voltage.
摘要翻译：本公开的一些实施例涉及具有检测一个或多个集成芯片的温度的热传感器的堆叠集成芯片结构。在一些实施例中，堆叠集成芯片结构具有位于插入器晶片上的主集成芯片和次集成芯片。主集成芯片具有产生偏置电流的参考电压源。次级集成芯片具有接收偏置电流的第二热二极管，并且基于此产生第二热感测电压和与次级集成芯片的温度成比例的第二参考电压。基于与第二热感测电压和参考电压的比较，主集成芯片内的数字热传感器确定二次集成芯片的温度。

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