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1. 发明申请

US20080107168A1 Advanced Digital Receiver 有权
标题翻译：高级数字接收机
公开(公告)号：US20080107168A1
公开(公告)日：2008-05-08
申请号：US11547816
申请日：2005-04-08
申请人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
发明人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
IPC分类号： H04L27/01
CPC分类号： H04L25/03057 , H04L1/006 , H04L7/0062 , H04L7/042 , H04L25/0212
摘要： A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
摘要翻译：用于处理从信道接收的信号的数字接收机包括耦合到数字解调器的数字解调器和均衡器。均衡器包括前馈滤波器和判决反馈均衡器（DFE），其中前馈滤波器包括多个前馈滤波器抽头。系数与多个前馈滤波器抽头相关联，并且动态地确定与多个前馈滤波器抽头相关联的所有系数的值。

2. 发明授权

US07995648B2 Advanced digital receiver 有权
标题翻译：高级数字接收机
公开(公告)号：US07995648B2
公开(公告)日：2011-08-09
申请号：US11547816
申请日：2005-04-08
申请人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
发明人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
IPC分类号： H04B1/10 , H04L1/00
CPC分类号： H04L25/03057 , H04L1/006 , H04L7/0062 , H04L7/042 , H04L25/0212
摘要： A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
摘要翻译：用于处理从信道接收的信号的数字接收机包括耦合到数字解调器的数字解调器和均衡器。均衡器包括前馈滤波器和判决反馈均衡器（DFE），其中前馈滤波器包括多个前馈滤波器抽头。系数与多个前馈滤波器抽头相关联，并且动态地确定与多个前馈滤波器抽头相关联的所有系数的值。

3. 发明授权

US08483317B2 Apparatus for and method of controlling sampling frequency and sampling phase of a sampling device 有权
标题翻译：用于控制取样装置的采样频率和采样相位的装置和方法
公开(公告)号：US08483317B2
公开(公告)日：2013-07-09
申请号：US11547819
申请日：2005-04-08
申请人： Jilian Zhu , Richard W. Citta , Scott M. Lopresto , David A. Willming , Shidong Chen
发明人： Jilian Zhu , Richard W. Citta , Scott M. Lopresto , David A. Willming , Shidong Chen
IPC分类号： H04B1/10
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device includes the steps of generating a complex representation of the value developed by the equalizer and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a sampling error estimate. The sampling error estimate is used to adjust the sampling frequency and sampling phase of the sampling device.
摘要翻译：根据耦合到采样装置的均衡器产生的值来控制采样装置的采样频率和采样相位的方法包括以下步骤：产生由均衡器开发的值的复数表示，并从输出端生成决策的表示的均衡器。复数表示和决策表示相关，以获得抽样误差估计。采样误差估计用于调整采样设备的采样频率和采样相位。

4. 发明授权

US07599433B2 Apparatus for and method of controlling a feedforward filter of an equalizer 有权
标题翻译：用于控制均衡器的前馈滤波器的装置和方法
公开(公告)号：US07599433B2
公开(公告)日：2009-10-06
申请号：US11578132
申请日：2005-04-08
申请人： Jilian Zhu , Scott M. Lopresto , David A. Willming , Shidong Chen , Gopalan Krishnamurthy
发明人： Jilian Zhu , Scott M. Lopresto , David A. Willming , Shidong Chen , Gopalan Krishnamurthy
IPC分类号： H03H7/30 , H03K5/159
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling a feedforward filter of an equalizer includes the steps of generating a complex representation of an output of the feedforward filter and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a phase error estimate. A phase correction value is generated based on the phase error estimate and used to adjust the phase of the output of the feedforward filter.
摘要翻译：控制均衡器的前馈滤波器的方法包括以下步骤：产生前馈滤波器的输出的复数表示，并从均衡器的输出生成决定的表示。复合表示和决策表示相关，以获得相位误差估计。基于相位误差估计产生相位校正值，用于调整前馈滤波器输出的相位。

5. 发明授权

US5636251A Receiver for a trellis coded digital television signal 失效
标题翻译：接收机用于网格编码的数字电视信号
公开(公告)号：US5636251A
公开(公告)日：1997-06-03
申请号：US593733
申请日：1996-01-29
申请人： Richard W. Citta , David A. Willming
发明人： Richard W. Citta , David A. Willming
IPC分类号： H04N7/26 , H03M13/23 , H03M13/25 , H03M13/41 , H04L1/00 , H04L25/08 , H04L27/34 , H04N5/44 , H04N7/66 , H04N21/2383 , H04N21/438 , H04L27/06
CPC分类号： H04L1/0054 , H04L27/3416 , H04N5/4401
摘要： A data receiver comprises a demodulator for recovering a received data signal comprising a stream of interleaved regularly spaced one-dimensional symbols of a phase invariant symbol constellation, each of the received symbols representing 3 bits, Z.sub.0, Z.sub.1, Z.sub.2 produced by convolutionally coding a first data bit X.sub.1 to derive bits Z.sub.0, Z.sub.1 and precoding a second data bit X.sub.2 to derive bit Z.sub.2. The received symbols are applied to a first decoder for estimating data bit X.sub.1 and a bit Y.sub.2, Y.sub.2 being applied to a postcoder for conversion to an estimate of data bit X.sub.2. The first decoder may comprise a Viterbi decoder or a 4-level slicer. In a preferred embodiment of the invention the received signal includes a plurality of regularly spaced synchronization intervals, each comprising a number of received symbols, and the second decoder is prevented from changing state during the synchronization intervals.
摘要翻译：数据接收机包括一个解调器，用于恢复接收到的数据信号，该数据信号包括相位不变符号星座的交错规则间隔的一维符号流，每个接收符号表示3位，Z0，Z1，Z2，通过卷积编码第一数据位X1以导出位Z0，Z1，并对第二数据位X2进行预编码以导出位Z2。所接收的符号被应用于用于估计数据位X1的第一解码器，并且将位Y2，Y2施加到后编码器以转换为数据位X2的估计。第一解码器可以包括维特比解码器或4级限幅器。在本发明的优选实施例中，接收信号包括多个规则间隔的同步间隔，每个间隔包括多个接收到的符号，并且防止第二解码器在同步间隔期间改变状态。

6. 发明授权

US5600677A Trellis coded modulation system for digital television signal 失效
标题翻译：网格编码调制系统，用于数字电视信号
公开(公告)号：US5600677A
公开(公告)日：1997-02-04
申请号：US586441
申请日：1996-01-16
申请人： Richard W. Citta , David A. Willming
发明人： Richard W. Citta , David A. Willming
IPC分类号： H04N7/26 , H03M13/23 , H03M13/25 , H03M13/41 , H04L1/00 , H04L25/08 , H04L27/34 , H04N5/44 , H04N7/66 , H04N21/2383 , H04N21/438 , H04L27/04 , H04L27/20
CPC分类号： H04L1/0054 , H04L27/3416 , H04N5/4401
摘要： A trellis coded modulation system comprises a first coder for convolutionally coding a first input data bit X.sub.1 for deriving first and second output bits Z.sub.0 and Z.sub.1. A second coder precodes a second input data bit X.sub.2 for deriving an output bit Z.sub.2. The output bits Z.sub.0, Z.sub.1 and Z.sub.2 are mapped into corresponding one-dimensional multi-value symbols, wherein the output bits Z.sub.0, Z.sub.1 identify respective subsets of the symbols, each of the subsets comprising two equally spaced symbol values, and the output bits Z.sub.1, Z.sub.2 identify respective pairs of the symbols, each of the pairs comprising two adjacent symbol values.
摘要翻译：网格编码调制系统包括用于卷积编码第一输入数据位X1以导出第一和第二输出位Z0和Z1的第一编码器。第二编码器对第二输入数据位X2进行预编码以导出输出位Z2。输出位Z0，Z1和Z2被映射到对应的一维多值符号中，其中输出位Z0，Z1标识符号的相应子集，每个子集包括两个等间隔的符号值，并且输出位Z1 ，Z2识别各对符号，每个对包括两个相邻的符号值。

7. 发明授权

US06044083A Synchronous code division multiple access communication system 失效
标题翻译：同步码分多址通信系统
公开(公告)号：US06044083A
公开(公告)日：2000-03-28
申请号：US659123
申请日：1996-06-04
申请人： Richard W. Citta , Stephen M. Dicke , David A. Willming
发明人： Richard W. Citta , Stephen M. Dicke , David A. Willming
IPC分类号： H04J13/00 , H04J13/18 , H04L12/56 , H04N7/173 , H04N21/61 , H04J13/04
CPC分类号： H04J13/004 , H04J13/18 , H04N21/6118 , H04N21/6168 , H04N7/17309 , H04L2012/5676
摘要： In a synchronous code division multiple access (SCDMA) system, a set of substantially orthogonal code words is selected such that each code word in the set of substantially orthogonal code words is minimally correlated with a channel characteristic such as noise. When a station transmits a data signal, it multiplies the data signal by its assigned code word in order to produce a spread data signal. The spread data signal is transmitted over the channel of the SCDMA system.
摘要翻译：在同步码分多址（SCDMA）系统中，选择一组基本上正交的码字，使得该组基本正交码字中的每个码字与诸如噪声的信道特性最小相关。当站发送数据信号时，它将数据信号乘以其分配的码字，以产生扩展数据信号。扩频数据信号通过SCDMA系统的信道发送。

8. 发明授权

US5583889A Trellis coded modulation system for HDTV 失效
标题翻译：网格编码高清电视调制系统
公开(公告)号：US5583889A
公开(公告)日：1996-12-10
申请号：US272181
申请日：1994-07-08
申请人： Richard W. Citta , David A. Willming
发明人： Richard W. Citta , David A. Willming
IPC分类号： H04N7/26 , H03M13/23 , H03M13/25 , H03M13/41 , H04L1/00 , H04L25/08 , H04L27/34 , H04N5/44 , H04N7/66 , H04N21/2383 , H04N21/438 , H04L27/06 , H04B1/10
CPC分类号： H04L1/0054 , H04L27/3416 , H04N5/4401
摘要： A trellis coded modulation system comprises a source of successive 2-bit data symbols X.sub.1, X.sub.2 arranged in a frame format wherein each frame comprises a plurality of data segments each including a plurality of groups of interleaved data symbols. Each group of interleaved data symbols is separately coded by a precoder and convolution encoder to derive coded output symbols Z.sub.0, Z.sub.1, Z.sub.2, which are mapped to respective 8-level symbols for transmission together with periodically generated frame and segment sync symbols. The received signal may be filtered by a linear filter, e.g. a comb filter, to reduce co-channel interference and each group of filtered symbols is applied to a respective first Viterbi decoder for estimating data bits X.sub.1 X.sub.2. Each first decoder preferably comprises a reduced complexity Viterbi decoder responsive to a partial representation of the state of the linear filter. Each group of received symbols may also be directly applied to a respective second Viterbi decoder for estimating data bits X.sub.1 X.sub.2. Estimated data bits X.sub.1 X.sub.2 from the first or second decoders are selected for further processing.
摘要翻译：网格编码调制系统包括以帧格式布置的连续的2比特数据符号X1，X2的源，其中每个帧包括多个数据段，每个数据段包括多组交织的数据符号。每组交织的数据符号由预编码器和卷积编码器分别编码，以导出编码的输出符号Z0，Z1，Z2，其被映射到相应的8级符号以及周期性产生的帧和段同步符号。所接收的信号可以被线性滤波器滤波，例如，梳状滤波器，以减少同信道干扰，并且将每组经滤波的符号应用于相应的第一维特比解码器，用于估计数据位X1 X2。每个第一解码器优选地包括响应于线性滤波器的状态的部分表示的复杂度降低的维特比解码器。每组接收到的符号也可以直接应用于相应的第二维特比解码器，用于估计数据位X1 X2。选择来自第一或第二解码器的估计数据位X1 X2用于进一步处理。

9. 发明授权

US5923711A Slice predictor for a signal receiver 失效
标题翻译：用于信号接收器的切片预测器
公开(公告)号：US5923711A
公开(公告)日：1999-07-13
申请号：US627826
申请日：1996-04-02
申请人： David A. Willming
发明人： David A. Willming
IPC分类号： H04L27/38 , H03M13/23 , H04L25/03 , H04L25/08 , H04L25/34 , H04L27/06 , H04L25/06
CPC分类号： H04L25/03273 , H04L2025/03382 , H04L25/03324
摘要： The disclosed data processor develops a data signal which has a plurality of multi-level symbols. The data processor, in response to each of the symbols, determines the lowest path metric characterizing the data signal, and selects one of a plurality of sets of slice values in response to the lowest path metric. A slicer responds to the selected set of slice values by slicing the multi-level symbols. There may be only two sets of slice values in the plurality of sets of slice values, wherein each of the only two sets has three slice levels. Alternatively, there may be only five sets of slice values in the plurality of sets of slice values, wherein each of the only five sets has five slice levels. As a still further alternative, there may be only two sets of slice values in the plurality of sets of slice values, wherein each of the only two sets has a minimum of six slice levels.
摘要翻译：所公开的数据处理器开发出具有多个多电平符号的数据信号。响应于每个符号，数据处理器确定表征数据信号的最低路径度量，并且响应于最低路径量度选择多个片值集合中的一个。限幅器通过对多级符号进行切片来响应所选择的一组片段值。在多组切片值中可能只有两组切片值，其中仅两组中的每一组具有三个切片级别。或者，在多组切片值中可能只有五组切片值，其中仅五组中的每一组具有五个切片级别。作为更进一步的替代方案，在多个切片值集合中可能只有两组切片值，其中仅两组中的每一个具有最少六个切片级别。

10. 发明授权

US5787129A Decoder for a trellis encoded signal corrupted by NTSC co-channel interference and white noise 失效
标题翻译：用于网格编码信号的解码器被NTSC同频干扰和白噪声所破坏
公开(公告)号：US5787129A
公开(公告)日：1998-07-28
申请号：US729611
申请日：1996-10-11
申请人： David A. Willming
发明人： David A. Willming
IPC分类号： H04B1/10 , H03D20060101 , H03D1/04 , H03K5/02 , H03M13/23 , H04B20060101 , H04L25/08
CPC分类号： H04L1/0048 , H03M13/256 , H03M13/41 , H04L1/0054
摘要： A receiver for decoding encoded data transmitted by a transmitting station includes (i) sum and difference filters for filtering the encoded data and for providing corresponding sum and difference filtered outputs, (ii) first and second variable gain amplifiers for respectively controlling the sum and difference filtered outputs so as to provide corresponding sum and difference controlled filtered outputs that vary along a continuum in order to suppress co-channel interference and white Gaussian noise in the encoded data, and (iii) a Viterbi decoder for decoding the sum and difference controlled filtered outputs to recover uncoded data.
摘要翻译：用于解码由发送站发送的编码数据的接收机包括：（i）用于对编码数据进行滤波和用于提供对应的和和差滤波输出的和和差分滤波器，（ii）分别控制和和差的第一和第二可变增益放大器滤波后的输出，以便提供沿着连续体变化的对应的和和差和受控滤波的输出，以便抑制编码数据中的同信道干扰和白高斯噪声，以及（iii）维特比解码器，输出来恢复未编码的数据。

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