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1. 发明授权

US09998231B2 Driver module for mach zehnder modulator 有权
公开(公告)号：US09998231B2
公开(公告)日：2018-06-12
申请号：US15832296
申请日：2017-12-05
申请人： INPHI CORPORATION
发明人： Radhakrishnan L. Nagarajan , Todd Rope
IPC分类号： H04B10/00 , H04B10/524 , G02F1/01 , G02F1/225 , H03M1/68 , G02F1/21
CPC分类号： H04B10/5161 , G02F1/0123 , G02F1/2255 , G02F1/2257 , G02F2001/212 , H03M1/682 , H04B10/524 , H04B10/541
摘要： A single chip dual-channel driver for two independent traveling wave modulators. The driver includes two differential pairs inputs per channel respectively configured to receive two digital differential pair signals. The driver further includes a two-bit DAC per channel coupled to the two differential pairs inputs to produce a single analog differential pair PAM signal at a differential pair output for driving a traveling wave modulator. Additionally, the driver includes a control block having internal voltage/current signal generators respective coupled to each input and the 2-bit DAC for providing a bias voltage, a tail current, a dither signal to assist modulation control per channel. Furthermore, the driver includes an internal I2C communication block coupled to a high-speed clock generator to generate control signals to the control block and coupled to host via an I2C digital communication interface.

2. 发明申请

US20180152656A1 SOLID-STATE IMAGING DEVICE 审中-公开
公开(公告)号：US20180152656A1
公开(公告)日：2018-05-31
申请号：US15797085
申请日：2017-10-30
申请人： Renesas Electronics Corporation
发明人： Osamu MATSUMOTO , Fukashi MORISHITA
IPC分类号： H04N5/378 , H03M1/46
CPC分类号： H04N5/378 , H03M1/123 , H03M1/46 , H03M1/466 , H03M1/682 , H03M1/765 , H04N5/37455
摘要： Provided is a solid-state imaging device capable of increasing the speed of an A/D converter. The solid-state imaging device includes a successive approximation A/D converter that performs A/D conversion on an analog pixel signal. The successive approximation A/D converter includes a D/A converter, a comparator, and a successive approximation register. The D/A converter converts a digital reference signal to an analog reference signal. The successive approximation register operates based on the result of comparison by the comparator to generate the digital reference signal in such a manner that the analog reference signal approximates the analog pixel signal. The D/A converter includes a split capacitor, first capacitors, second capacitors, a switch array, a third capacitor, and a multiplexer. The first capacitors each have a first electrode coupled to the output node. The second capacitors are coupled to a second electrode of the split capacitor. The switch array is coupled to a second electrode of each of the first and second capacitors and is adapted to generate the analog reference signal at the output node by selectively applying a first reference voltage. The third capacitor is coupled to the second electrode of the split capacitor. The multiplexer is coupled to a second electrode of the third capacitor and is adapted to generate the analog reference signal at the output node by selectively applying a second reference voltage.

3. 发明申请

US20180083648A1 DIGITAL TO ANALOG CONVERTER 审中-公开
公开(公告)号：US20180083648A1
公开(公告)日：2018-03-22
申请号：US15697233
申请日：2017-09-06
申请人： Apple Inc.
发明人： Baris Cagdaser , Derek K. Shaeffer , Hopil Bae , Jesse Aaron Richmond , Jie Won Ryu , Kingsuk Brahma , Mohammad B. Vahid Far , Shingo Hatanaka , Yafei Bi , Yuichi Okuda
IPC分类号： H03M1/78 , H03M1/76 , H03M1/74 , H03M1/68
CPC分类号： H03M1/785 , G09G2320/0276 , H03M1/682 , H03M1/747 , H03M1/765
摘要： A device includes a resistor string that includes a plurality resistors with voltage taps disposed therebetween. The device may select one particular voltage tap of the plurality of voltage taps based on received gray level data for a pixel of a display. The device also includes a first amplifier that may be coupled to a first terminal end of the resistor string. The device additionally includes a second amplifier that may be coupled to a second terminal end of the resistor string, wherein the plurality of voltage taps may each supply a tap voltage derived from a voltage between the first amplifier and the second amplifier, wherein any tap amplifier of the device coupled to a voltage tap of the plurality of voltage taps provides a reference voltage thereto.

4. 发明申请

US20160359497A1 APPARATUS FOR DIGITAL-TO-ANALOG CONVERSION WITH IMPROVED PERFORMANCE AND ASSOCIATED METHODS 有权
标题翻译：具有改进性能和相关方法的数字到模拟转换的设备
公开(公告)号：US20160359497A1
公开(公告)日：2016-12-08
申请号：US14732700
申请日：2015-06-06
申请人： Silicon Laboratories Inc.
发明人： Axel Thomsen , Alan L. Westwick
IPC分类号： H03M1/06 , H03M1/68 , H03M1/00 , H03M1/66
CPC分类号： H03M1/0607 , H03K5/003 , H03M1/00 , H03M1/002 , H03M1/0609 , H03M1/66 , H03M1/664 , H03M1/682 , H03M1/747 , H03M1/808
摘要： Apparatus and associated methods are disclosed for digital-to-analog conversion with improved performance. In one exemplary embodiment, an apparatus includes a DAC to convert a digital input signal to an analog output signal. The DAC includes a decoder to decode the digital input signal and to provide first and second sets of control signals. The DAC also includes a resistor DAC (RDAC) to provide first and second voltages in response to the first set of control signals. The DAC further includes an interpolator coupled to receive the first and second voltages and to provide a first analog signal in response to the second set of control signals.
摘要翻译：公开了用于具有改进的性能的数模转换的装置和相关方法。在一个示例性实施例中，装置包括将数字输入信号转换为模拟输出信号的DAC。 DAC包括解码器以解码数字输入信号并提供第一和第二组控制信号。 DAC还包括电阻DAC（RDAC），以响应于第一组控制信号来提供第一和第二电压。 DAC还包括内插器，其被耦合以接收第一和第二电压并且响应于第二组控制信号而提供第一模拟信号。

5. 发明授权

US09100045B2 Multiple string digital to analog converter 有权
标题翻译：多串数模转换器
公开(公告)号：US09100045B2
公开(公告)日：2015-08-04
申请号：US14214341
申请日：2014-03-14
申请人： ANALOG DEVICES GLOBAL
发明人： Dennis A. Dempsey
IPC分类号： H03M1/66 , H03M1/68 , H03M1/00 , H03M1/06 , H03M1/76
CPC分类号： H03M1/68 , H03M1/00 , H03M1/06 , H03M1/66 , H03M1/682 , H03M1/765
摘要： A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. In one configuration, the DAC comprises a first and second switching network, the second switching network providing multiple switched paths which compensate for impedance effects of the second string and provides multiple state changes at the output node of the DAC.
摘要翻译：描述多串DAC并且包括至少两个DAC级。每个DAC级包括一串阻抗元件和一个交换网络。在一种配置中，DAC包括第一和第二交换网络，第二交换网络提供多个交换路径，其补偿第二串的阻抗效应，并在DAC的输出节点处提供多个状态改变。

6. 发明授权

US08963757B2 D/A converter including higher-order resistor string 有权
标题翻译： D / A转换器包括高阶电阻串
公开(公告)号：US08963757B2
公开(公告)日：2015-02-24
申请号：US13602821
申请日：2012-09-04
申请人： Koji Hirai
发明人： Koji Hirai
IPC分类号： H03M1/78 , H03M1/68 , G09G3/36 , H03M1/74 , H03M1/00 , H03M1/76
CPC分类号： H03M1/682 , G09G3/3688 , H03M1/00 , H03M1/747 , H03M1/765 , H03M1/785
摘要： A resistor string digital-to-analog converter includes an input terminal receiving a digital input signal in digital code, an output terminal revealing an analog output signal in analog voltage, a first plurality of voltage-acquisition nodes including a first pair of nodes which is adjacent to each other, a first plurality of resistors being connected in series via the first plurality of voltage-acquisition nodes, a second pair of nodes revealing a pair of analog voltages, a high-order voltage-acquisition circuit providing conduction between a respective one of the first pair of nodes and a respective one of the second pair of nodes in accordance with the digital input signal, a low-order converter generating the analog output signal, which is obtained by interpolating one and the other of the pair of analog voltages in accordance with the digital input signal.
摘要翻译：一种电阻串数模转换器，包括以数字码接收数字输入信号的输入端，以模拟电压显示模拟输出信号的输出端，包括第一对节点的第一多个电压采集节点，彼此相邻的第一多个电阻器通过第一多个电压采集节点串联连接，第二对节点露出一对模拟电压，高阶电压采集电路提供相应的一个的第一对节点和第二对节点中的相应一个根据数字输入信号，产生模拟输出信号的低阶转换器，其通过内插一对模拟电压中的一个和另一个而获得按照数字输入信号。

7. 发明授权

US08912939B2 String DAC leakage current cancellation 有权
标题翻译：串DAC泄漏电流消除
公开(公告)号：US08912939B2
公开(公告)日：2014-12-16
申请号：US13839801
申请日：2013-03-15
申请人： Dennis A. Dempsey
发明人： Dennis A. Dempsey
IPC分类号： H03M1/78 , H03M1/66
CPC分类号： H03M1/66 , H03M1/06 , H03M1/682 , H03M1/765
摘要： Embodiments of the present invention may provide a multi-string DAC with leakage current cancellation. A leakage cancellation circuit may be coupled to output node(s) of the—multi-string DAC. The leakage cancellation circuit may replicate leakage current present at the coupled output node(s) and generate a corresponding complementary signal, a leakage cancellation signal. The leakage cancellation signal may be injected into the coupled output node(s) to cancel (or reduce) the net impact of the leakage current.
摘要翻译：本发明的实施例可以提供具有泄漏电流消除的多串DAC。泄漏消除电路可以耦合到多串DAC的输出节点。泄漏消除电路可以复制存在于耦合的输出节点处的泄漏电流并产生相应的互补信号，泄漏消除信号。泄漏抵消信号可以被注入耦合的输出节点以消除（或减少）泄漏电流的净冲击。

8. 发明授权

US08907832B2 Polarity compensating dual-string digital-to-analog converters (DACs), and related circuits, systems, and methods 有权
标题翻译：极性补偿双串数模转换器（DAC）以及相关电路，系统和方法
公开(公告)号：US08907832B2
公开(公告)日：2014-12-09
申请号：US13834184
申请日：2013-03-15
申请人： QUALCOMM Incorporated
发明人： Burt L. Price , Dhaval R. Shah , Yeshwant Nagaraj Kolla
IPC分类号： H03M1/78 , H03M1/68 , H03M1/06 , H03M1/76
CPC分类号： H03M1/68 , H03M1/0602 , H03M1/682 , H03M1/765
摘要： Polarity compensating dual-string digital-to-analog converters (DACs), and related circuits, systems, and methods are disclosed. In embodiments disclosed herein, a secondary voltage divider of a dual-string DAC includes a switch logic unit. The switch logic unit is configured to compensate for polarity changes in the dual-string DAC to maintain monotonicity. Monotonicity means an output voltage of a DAC either increases or stays constant for monotonically increasing functions or either decreases or stays constant for monotonically decreasing functions given an incremental change in a DAC input code. The switch logic unit is configured to compensate for polarity changes in the input voltage from the primary voltage divider to the secondary resistor string. The switch logic unit is configured to select a secondary switch among the plurality of secondary switches in a secondary voltage divider, to divide an input voltage based on a polarity indicator and a DAC input code, to maintain monotonicity.
摘要翻译：公开了极性补偿双串数/模转换器（DAC）以及相关电路，系统和方法。在本文公开的实施例中，双串DAC的次级分压器包括开关逻辑单元。开关逻辑单元被配置为补偿双串DAC中的极性变化以保持单调性。单调性意味着DAC的输出电压对于单调增加的功能而言增加或保持恒定，或者在给定DAC输入代码的增量变化时单调递减的函数减小或保持恒定。开关逻辑单元被配置为补偿从一次分压器到次级电阻器串的输入电压的极性变化。开关逻辑单元被配置为在次级分压器中的多个次级开关中选择次级开关，以基于极性指示器和DAC输入代码来分压输入电压，以保持单调性。

9. 发明授权

US08884799B2 Dual-string digital-to-analog converters (DACs), and related circuits, systems, and methods 有权
标题翻译：双串数模转换器（DAC）以及相关电路，系统和方法
公开(公告)号：US08884799B2
公开(公告)日：2014-11-11
申请号：US13834041
申请日：2013-03-15
申请人： QUALCOMM Incorporated
发明人： Burt L. Price , Dhaval R. Shah , Yeshwant Nagaraj Kolla
IPC分类号： H03M1/66 , H03M1/78 , H03M1/76
CPC分类号： H03M1/808 , H03M1/002 , H03M1/06 , H03M1/682 , H03M1/76 , H03M1/765 , H03M1/78 , H03M1/785
摘要： Dual-string digital-to-analog converters (DACs), and related circuits, systems, and methods are disclosed. In embodiments disclosed herein, a primary voltage divider of the dual string-DAC is comprised of at least one adjusting circuit. The adjusting circuit is configured to maintain the ideal voltage of a selected resistor node pair across a secondary voltage divider circuit in response to a primary switch unit selecting a selected resistor node pair. In this manner, impedance isolation is not required between a primary voltage divider and the secondary voltage divider circuit of the dual-string DAC. As a result, as non-limiting examples, the area on an integrated circuit (IC) for a dual-string DAC may be decreased, power consumption of the DAC may be decreased, and/or the dual-string DAC may have increased performance by not requiring a settling time.
摘要翻译：公开了双串数/模转换器（DAC）及相关电路，系统和方法。在本文公开的实施例中，双串DAC的初级分压器由至少一个调节电路组成。调整电路被配置为响应于主开关单元选择所选择的电阻器节点对，在次级分压器电路上保持所选择的电阻器节点对的理想电压。以这种方式，双串DAC的初级分压器和次级分压器电路之间不需要阻抗隔离。结果，作为非限制性示例，可以减小用于双串DAC的集成电路（IC）上的面积，DAC的功耗可能降低，和/或双串DAC可以具有增加的性能不需要安置时间。

10. 发明申请

US20140313066A1 MULTIPLE STRING DIGITAL TO ANALOG CONVERTER 有权
标题翻译：多模数字转换器
公开(公告)号：US20140313066A1
公开(公告)日：2014-10-23
申请号：US14214341
申请日：2014-03-14
申请人： ANALOG DEVICES TECHNOLOGY
发明人： Dennis A. Dempsey
IPC分类号： H03M1/68
CPC分类号： H03M1/68 , H03M1/00 , H03M1/06 , H03M1/66 , H03M1/682 , H03M1/765
摘要： A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. In one configuration, the DAC comprises a first and second switching network, the second switching network providing multiple switched paths which compensate for impedance effects of the second string and provides multiple state changes at the output node of the DAC.
摘要翻译：描述多串DAC并且包括至少两个DAC级。每个DAC级包括一串阻抗元件和一个交换网络。在一种配置中，DAC包括第一和第二交换网络，第二交换网络提供多个交换路径，其补偿第二串的阻抗效应，并在DAC的输出节点处提供多个状态改变。

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