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1. 发明公开

US20230325650A1 VECTOR-BY-MATRIX-MULTIPLICATION ARRAY UTILIZING ANALOG OUTPUTS 审中-公开
公开(公告)号：US20230325650A1
公开(公告)日：2023-10-12
申请号：US17847491
申请日：2022-06-23
申请人： Silicon Storage Technology, Inc.
发明人： Hieu Van Tran , THUAN VU , STANLEY HONG , STEPHEN TRINH , MARK REITEN
IPC分类号： G06G7/06 , G06G7/16
CPC分类号： G06G7/06 , G06G7/16
摘要： Numerous examples are disclosed of an artificial neural network that comprises vector-by-matrix multiplication arrays utilizing analog outputs. In one example, a system comprises a vector by matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns; and an output circuit to receive a respective neuron current from respective columns of the vector by matrix multiplication array and to generate a respective output voltage, the output circuit comprising a neuron scalar to generate a scaled current from the received respective neuron current, and a current-to-voltage converter to convert the scaled current into the respective output voltage.

2. 发明授权

US10261932B2 Microcontroller programmable system on a chip 有权
公开(公告)号：US10261932B2
公开(公告)日：2019-04-16
申请号：US15455393
申请日：2017-03-10
申请人： Cypress Semiconductor Corporation
发明人： Warren S. Snyder , Monte Mar
IPC分类号： G06F13/40 , G06F1/08 , G06F1/32 , G06F9/445 , G06F13/10 , G06F13/36 , G06F15/78 , G06G7/06 , G11C16/10 , H03B5/32 , H03B5/36 , H03H19/00 , H03K3/012 , H03K3/014 , H03K3/0231 , G06F13/42 , G05B19/042
摘要： Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.

3. 发明授权

US09286254B2 Microcontroller programmable system on a chip with programmable interconnect 有权
标题翻译：微控制器可编程系统，具有可编程互连芯片
公开(公告)号：US09286254B2
公开(公告)日：2016-03-15
申请号：US13966028
申请日：2013-08-13
申请人： Cypress Semiconductor Corporation
发明人： Warren S. Snyder
IPC分类号： G06F15/78 , G06F13/40 , G06F1/08 , G06F1/32 , G06G7/06 , H03B5/36 , H03H19/00 , H03K3/012 , H03K3/014 , H03K3/0231
CPC分类号： G06F13/4068 , G05B19/0423 , G05B2219/25033 , G06F1/08 , G06F1/32 , G06F9/44505 , G06F13/102 , G06F13/36 , G06F13/40 , G06F13/4282 , G06F15/7817 , G06F15/7867 , G06G7/06 , G11C16/10 , H03B5/32 , H03B5/364 , H03H19/004 , H03K3/012 , H03K3/014 , H03K3/02315
摘要： Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
摘要翻译：本发明的实施例涉及具有微处理器，可编程存储器组件以及可编程模拟和数字模块的微控制器设备。可编程模拟和数字模块可根据存储在存储器组件中的编程信息进行配置。可编程互连逻辑，也可从存储器组件编程，用于根据需要耦合可编程模拟和数字模块。先进的微控制器设计还包括用于将所选信号耦合到外部引脚的可编程输入/输出块。存储器组件还包括嵌入式微处理器执行的用户程序。这些程序可以包括用于例如动态地对“数字”和“模拟”块进行编程的指令。在一个实现中，存在多个可编程数字块和多个可编程模拟块。

4. 发明授权

US06910126B1 Programming methodology and architecture for a programmable analog system 有权
标题翻译：可编程模拟系统的编程方法和架构
公开(公告)号：US06910126B1
公开(公告)日：2005-06-21
申请号：US09930021
申请日：2001-08-14
申请人： Monte Mar , Warren Snyder
发明人： Monte Mar , Warren Snyder
IPC分类号： G06F1/08 , G06F1/32 , G06F15/78 , G06G7/06 , H03B5/36 , H03K3/012 , H03K3/014 , H03K3/0231 , G06F13/14
CPC分类号： G06F15/7867 , G06F1/08 , G06F1/32 , G06G7/06 , H03B5/364 , H03K3/012 , H03K3/014 , H03K3/02315
摘要： A method of programming a programmable analog device that introduces on a single chip a set of tailored analog blocks and elements that can be configured and reconfigured in different ways to implement a variety of different analog functions. The analog blocks can be electrically coupled to each other in different combinations to perform different analog functions. Each analog block includes analog elements that have changeable characteristics that can be specified according to the function to be performed. Configuration registers define the type of function to be performed, the way in which the analog blocks are to be coupled, the inputs and outputs of the analog blocks, and the characteristics of the analog elements. The configuration registers can be dynamically programmed. Thus, the device can be used to realize a large number of different analog functions and applications.
摘要翻译：一种编程可编程模拟设备的方法，该可编程模拟设备在单个芯片上引入可以以不同方式配置和重新配置以实现各种不同模拟功能的一组定制的模拟块和元件。模拟块可以以不同的组合彼此电耦合以执行不同的模拟功能。每个模拟块包括具有可根据要执行的功能指定的可变特性的模拟元件。配置寄存器定义要执行的功能类型，模拟模块的耦合方式，模拟模块的输入和输出以及模拟元件的特性。配置寄存器可以动态编程。因此，该装置可用于实现大量不同的模拟功能和应用。

5. 发明授权

US5774008A Computational circuit 失效
标题翻译：计算电路
公开(公告)号：US5774008A
公开(公告)日：1998-06-30
申请号：US766875
申请日：1996-12-13
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
IPC分类号： G06G7/06 , G06G7/14 , G06G7/26 , G06J1/00 , G06N3/063 , G11C27/02 , G06G7/42 , H03K17/62
CPC分类号： G11C27/024 , G06G7/06 , G06G7/14 , G06G7/26 , G06J1/00 , G06N3/0635
摘要： Addition is performed by a capacitive coupling or resistive coupling. A quantizing circuit is realized by plurality of thresholding circuits receiving an analog input voltages. Subtraction in performed by two MOSs of anti-polarity inputted analog input voltages to gates.
摘要翻译：通过电容耦合或电阻耦合进行加法。量化电路由接收模拟输入电压的多个阈值电路实现。由两个MOS反极性输入的模拟输入电压对门进行减法。

6. 发明授权

US4167788A Programmable sequence control device simulating flow chart sequences 失效
标题翻译：可编程序列控制装置，模拟流程图序列
公开(公告)号：US4167788A
公开(公告)日：1979-09-11
申请号：US827352
申请日：1977-08-24
申请人： Junichi Senba
发明人： Junichi Senba
IPC分类号： G06F9/26 , G06G7/00 , G06G7/06 , G06G7/48 , G06J1/00
CPC分类号： G06F9/262
摘要： A programmable sequence control device for programming a control sequence by simulating the steps of a flow chart comprises a plurality of stages each of which is visually representative of a step in the flow chart and is selectively wired to other stages for simulating the flow chart. The stages comprise contact points representing output terminals, address terminal and jumping control terminal, respectively. A logic control circuit between each two stages at the respective contact points comprises first logic means producing a first output signal based on the combination of signals at the output terminal and jumping control terminal of a first stage and second logic means responsive to an address signal applied to the address terminal of another stage for producing a further output signal applied at the output terminal of the latter stage. Upon application of a starting command at a selected stage, the stages sequence through the steps simulating the operations of the intended flow chart.
摘要翻译：用于通过模拟流程图的步骤对控制序列进行编程的可编程序列控制装置包括多个级，其中每一级视觉上代表流程图中的步骤，并且选择性地连接到用于模拟流程图的其它级。这些阶段分别包括表示输出端子，地址端子和跳跃控制端子的接触点。在各个接触点处的每个两级之间的逻辑控制电路包括第一逻辑装置，其基于输出端的信号和第一级的跳跃控制端的组合产生第一输出信号，第二逻辑装置响应于施加的地址信号到另一级的地址端，用于产生在后级输出端施加的另一输出信号。在选定阶段应用启动命令时，通过模拟预期流程图的操作的步骤进行分段。

7. 发明授权

US4074113A Punched-card programmable analog computer 失效
标题翻译：冲压卡可编程模拟计算机
公开(公告)号：US4074113A
公开(公告)日：1978-02-14
申请号：US650255
申请日：1976-01-19
申请人： Edwin Z. Gabriel
发明人： Edwin Z. Gabriel
IPC分类号： G06G7/02 , G06G7/06 , G09B23/02 , G06G7/48
CPC分类号： G06G7/02 , G06G7/06 , G09B23/02
摘要： To satisfy the need for an easily programmable portable analog computer, a compact, punched-card programmable computer is herein described. This compact computer may be programmed three different ways: 1. using conventional patch cords; 2. using mechanical switches; and 3. using a single punched card. The top panel of the cabinet is a combination patching, switching and electronic module board and includes all of the computing components, toggle switches, mode control switch, power switch, voltmeters and computing module diagrams. The mode control switch enables the user to perform "reset", "hold" and "compute" operations. The voltmeters enable input and output voltages of a programmed problem to be measured simultaneously. Switches or relays enable the user to inter-connect computing components, while jacks on the board permit patching other components of a problem, previously programmed on a sheet, for which switches or relays have not been provided. Program symbols appear on covers over the computing modules identical or similar to the ones appearing on a programmed sheet.To one side of the main computer cabinet is attached the punched card device, an ancillary part. This device may be used at the option of the programmer when solutions to many problems need to be demonstrated in rapid succession, as by a teacher of mathematics. For each problem, a previously punched card would be used by the teacher to program or interconnect most of the computing components of the simulation. Since the computing modules are recessed within the panel, there are no objectionable protrusions above the panel. Thus, the user is not confused as to which components are interconnected or to be connected when using patch cords, or to interfere with the patching operation. The designs exemplify the utmost in simplicity.
摘要翻译：为了满足对易于编程的便携式模拟计算机的需要，本文描述了一种紧凑的穿孔卡可编程计算机。这种紧凑型计算机可以通过三种不同的方式进行编程：1.使用常规跳线; 2.使用机械开关; 和3.使用单张打孔卡。机柜顶部是一个组合的补丁，开关和电子模块板，包括所有的计算组件，拨动开关，模式控制开关，电源开关，电压表和计算模块图。模式控制开关使用户能够执行“复位”，“保持”和“计算”操作。电压表可以同时测量编程问题的输入和输出电压。开关或继电器使用户能够互连计算组件，而板上的插孔允许修补先前在片材上编程的其他组件，这些组件尚未提供开关或继电器。程序符号出现在与编程表格上出现的计算模块相同或相似的计算模块上的封面上。

8. 发明授权

US3857027A D.c. modules employed for simulating electric power system for loadflow and transient stability studies 失效
标题翻译：用于模拟电力系统的模块用于流动和瞬态稳定性研究
公开(公告)号：US3857027A
公开(公告)日：1974-12-24
申请号：US25504872
申请日：1972-05-19
申请人： WESTINGHOUSE ELECTRIC CORP
发明人： CARLSON N , ZITELLI W
IPC分类号： G06G7/06 , G06J1/00 , G06F15/06 , G06F15/56
CPC分类号： G06G7/06
摘要： Loadflow computer arrangements with transient stability analysis capabilities include a modularized analog network simulator which includes modular representation of power system busses, generators, loads, tie lines, and lines interconnected to simulate the power system. Generators are represented as constant terminal voltage magnitude behind transient reactance generators, while loads are represented as constant admittance loads. The modular generator circuits are constrained by generator mechanical power and terminal voltage magnitude set points. The modular load circuits include representative load admittance values variable under loadflow conditions and constant under transient conditions. Tie line circuits are constrained by external infinite bus voltage values. The modular bus circuits are interconnected with the modular generator, load, tie line and line circuits for operation to enforce current and voltage laws to provide the loadflow solution. The modular generator circuits provide generator swing angle output values for transient analysis.
摘要翻译：具有瞬态稳定性分析功能的负载流计算机配置包括模块化模拟网络模拟器，其包括电力系统总线，发电机，负载，连接线和互连以模拟电力系统的线路的模块化表示。发电机表示为瞬态电抗发电机后的恒定端电压值，负载表示为恒定导纳负载。模块化发电机电路受发电机机械功率和端子电压幅度设定点的约束。模块化负载电路包括在负载流动条件下可变的代表性负载导纳值，并且在瞬态条件下恒定。领带电路受外部无限总线电压值约束。模块化总线电路与模块化发电机，负载，连接线和线路电路互连，用于执行电流和电压定律以提供负载流解决方案。模块化发电机电路为瞬态分析提供发电机摆角输出值。

9. 发明授权

US3825732A Hybrid power system modules 失效
标题翻译：混合动力系统模块
公开(公告)号：US3825732A
公开(公告)日：1974-07-23
申请号：US25524672
申请日：1972-05-19
申请人： WESTINGHOUSE ELECTRIC CORP
发明人： HALEY P , ENNS M
IPC分类号： G06G7/06 , G06G7/63 , G06G7/62
CPC分类号： G06G7/63 , G06G7/06
摘要： Loadflow computer arrangements include a modularized analog network simulator which includes modular circuits representing power system generators and loads, as well as buses and lines. The modular generator circuit generator is constrained by scheduled generator electrical power and voltage magnitude values, and the modular load circuit is constrained by scheduled load power values. The modular bus, line, generator and load circuits are interconnected to simulate the power system and operate to force currents and voltages to satisfy current and voltage laws to provide the bus voltage solution.
摘要翻译：负载流计算机配置包括模块化模拟网络模拟器，其包括代表电力系统发电机和负载的模块化电路，以及总线和线路。模块化发电机电路发电机受到预定的发电机电功率和电压幅值的约束，模块化负载电路受预定负载功率值约束。模块化总线，线路，发电机和负载电路互连以模拟电力系统，并操作以强制电流和电压满足电流和电压定律以提供总线电压解决方案。

10. 发明授权

US3587055A Plural operator-station time-shared analog computer apparatus 失效
标题翻译：多操作者站时间共享模拟计算机设备
公开(公告)号：US3587055A
公开(公告)日：1971-06-22
申请号：US3587055D
申请日：1968-12-02
申请人： RELIANCE ELECTRIC CO
发明人： GILBERT ELMER G
IPC分类号： G06G7/06 , G06F3/02
CPC分类号： G06G7/06
摘要： A plurality of users situated at a plurality of remote terminal units are enabled to utilize a general-purpose analog computer in a time-sharing arrangement allowing each user to obtain solutions of his own versions of one or several basic problems which are simultaneously patched on the analog computer. An addressing system services the remote terminal units sequentially, and the analog computer runs one or more problem solutions when a given terminal unit is being serviced using coefficient data and problem configuration data established by the user at the given terminal unit. Both analog and digital arrangements for transmitting coefficient data from each terminal unit to the analog computer are illustrated.

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