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    • 3. 发明授权
    • Protection circuit for power amplifier
    • 功率放大器保护电路
    • US09559639B2
    • 2017-01-31
    • US12715250
    • 2010-03-01
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • H04B1/04H03F1/52H03F3/24H03G3/30
    • H03F1/52H03F3/24H03F2200/435H03F2200/78H03G3/3042H04B2001/0408
    • Techniques for protecting a power amplifier (PA) are described. In an exemplary design, an apparatus includes (i) a PA module to amplify an input RF signal and provide an output RF signal and (ii) a protection circuit to control a transmitter gain to protect the PA module against high peak voltage. In an exemplary design, the protection circuit includes a set of comparators to quantize an analog input signal and provide digital comparator output signals used to adjust the transmitter gain. In another exemplary design, the protection circuit reduces and increases the transmitter gain with hysteresis. In yet another exemplary design, the protection circuit has faster response to rising amplitude than falling amplitude of the output RF signal. The hysteresis and/or the different rise and fall responses may allow the protection circuit to avoid toggling the transmitter gain under severe load mismatch and to handle time-varying envelope due to amplitude modulation.
    • 描述了用于保护功率放大器(PA)的技术。 在示例性设计中,装置包括(i)PA模块,用于放大输入RF信号并提供输出RF信号,以及(ii)保护电路以控制发射机增益以保护PA模块免受高峰值电压。 在示例性设计中,保护电路包括一组比较器,用于量化模拟输入信号并提供用于调整发射机增益的数字比较器输出信号。 在另一示例性设计中,保护电路通过滞后减小并增加发射机增益。 在又一示例性设计中,保护电路比对输出RF信号的下降幅度具有对振幅上升的响应更快。 迟滞和/或不同的上升和下降响应可以允许保护电路避免在严重负载不匹配的情况下切换发射机增益,并且由于幅度调制来处理时变包络。
    • 4. 发明申请
    • PROTECTION CIRCUIT FOR POWER AMPLIFIER
    • 功率放大器保护电路
    • US20110043956A1
    • 2011-02-24
    • US12715250
    • 2010-03-01
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • H02H3/20
    • H03F1/52H03F3/24H03F2200/435H03F2200/78H03G3/3042H04B2001/0408
    • Techniques for protecting a power amplifier (PA) are described. In an exemplary design, an apparatus includes (i) a PA module to amplify an input RF signal and provide an output RF signal and (ii) a protection circuit to control a transmitter gain to protect the PA module against high peak voltage. In an exemplary design, the protection circuit includes a set of comparators to quantize an analog input signal and provide digital comparator output signals used to adjust the transmitter gain. In another exemplary design, the protection circuit reduces and increases the transmitter gain with hysteresis. In yet another exemplary design, the protection circuit has faster response to rising amplitude than falling amplitude of the output RF signal. The hysteresis and/or the different rise and fall responses may allow the protection circuit to avoid toggling the transmitter gain under severe load mismatch and to handle time-varying envelope due to amplitude modulation.
    • 描述了用于保护功率放大器(PA)的技术。 在示例性设计中,装置包括(i)PA模块,用于放大输入RF信号并提供输出RF信号,以及(ii)保护电路以控制发射机增益以保护PA模块免受高峰值电压。 在示例性设计中,保护电路包括一组比较器,用于量化模拟输入信号并提供用于调整发射机增益的数字比较器输出信号。 在另一示例性设计中,保护电路通过滞后减小并增加发射机增益。 在又一示例性设计中,保护电路比对输出RF信号的下降幅度具有对振幅上升的响应更快。 迟滞和/或不同的上升和下降响应可以允许保护电路避免在严重负载不匹配的情况下切换发射机增益,并且由于幅度调制来处理时变包络。
    • 6. 发明授权
    • Cascode amplifier with protection circuitry
    • 带保护电路的串联放大器
    • US08022772B2
    • 2011-09-20
    • US12407729
    • 2009-03-19
    • Marco CassiaGurkanwal Singh Sahota
    • Marco CassiaGurkanwal Singh Sahota
    • H03F1/22
    • H03F1/223H03F1/523H03F3/211H03F3/72H03F2200/27H03F2200/294H03F2203/7206H03F2203/7215H03F2203/7236H03G1/0088
    • A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
    • 描述了具有保护电路的共源共栅放大器。 在一个示例性设计中,放大器包括并联耦合的多个分支,至少一个分支可在“开”和“关”状态之间切换。 每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。 增益晶体管放大输入信号,并将放大的信号提供为导通状态,并且不将输入信号放大在关闭状态。 共源共栅晶体管缓冲放大的信号,并提供处于导通状态的输出信号。 在保护电路中,输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。 然后,每个晶体管可以观察电压摆幅的一小部分。 断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。
    • 8. 发明申请
    • SWITCHES WITH VARIABLE CONTROL VOLTAGES
    • 具有可变控制电压的开关
    • US20110025404A1
    • 2011-02-03
    • US12623232
    • 2009-11-20
    • Marco Cassia
    • Marco Cassia
    • H03K17/687
    • H03K17/693H03K17/08122H03K17/102H03K2017/066H03K2217/0054
    • Switches with variable control voltages and having improved reliability and performance are described. In an exemplary design, an apparatus includes a switch, a peak voltage detector, and a control voltage generator. The switch may be implemented with stacked transistors. The peak voltage detector detects a peak voltage of an input signal provided to the switch. In an exemplary design, the control voltage generator generates a variable control voltage to turn off the switch based on the detected peak voltage. In another exemplary design, the control voltage generator generates a variable control voltage to turn on the switch based on the detected peak voltage. In yet another exemplary design, the control voltage generator generates a control voltage to turn on the switch and attenuate the input signal when the peak voltage exceeds a high threshold.
    • 描述了具有可变控制电压并具有改进的可靠性和性能的开关。 在示例性设计中,装置包括开关,峰值电压检测器和控制电压发生器。 开关可以用堆叠晶体管来实现。 峰值电压检测器检测提供给开关的输入信号的峰值电压。 在示例性设计中,控制电压发生器产生可变控制电压,以基于检测到的峰值电压来关断开关。 在另一示例性设计中,控制电压发生器产生可变控制电压,以基于检测到的峰值电压来接通开关。 在另一示例性设计中,当峰值电压超过高阈值时,控制电压发生器产生控制电压以接通开关并衰减输入信号。
    • 9. 发明申请
    • HIGH VOLTAGE LOGIC CIRCUITS
    • 高电压逻辑电路
    • US20110018583A1
    • 2011-01-27
    • US12619562
    • 2009-11-16
    • Marco Cassia
    • Marco Cassia
    • H03K19/0175
    • H03K19/018521H03K19/0013H03K19/00315
    • High voltage logic circuits that can handle digital input and output signals having a larger voltage range are described. In an exemplary design, a high voltage logic circuit includes an input stage, a second stage, and an output stage. The input stage receives at least one input signal and provides (i) at least one first intermediate signal having a first voltage range and (ii) at least one second intermediate signal having a second voltage range. The second stage receives and processes the first and second intermediate signals based on a logic function and provides (i) a first drive signal having the first voltage range and (ii) a second drive signal having the second voltage range. The output stage receives the first and second drive signals and provides an output signal having a third voltage range, which may be larger than each of the first and second voltage ranges.
    • 描述了可以处理具有较大电压范围的数字输入和输出信号的高电压逻辑电路。 在示例性设计中,高压逻辑电路包括输入级,第二级和输出级。 输入级接收至少一个输入信号,并提供(i)具有第一电压范围的至少一个第一中间信号和(ii)具有第二电压范围的至少一个第二中间信号。 第二级基于逻辑功能接收和处理第一和第二中间信号,并提供(i)具有第一电压范围的第一驱动信号和(ii)具有第二电压范围的第二驱动信号。 输出级接收第一和第二驱动信号,并提供具有第三电压范围的输出信号,其可以大于第一和第二电压范围中的每一个。