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    • 88. 发明申请
    • Circuit for Reading Memory Cells
    • 读取存储单元的电路
    • US20090285016A1
    • 2009-11-19
    • US12491352
    • 2009-06-25
    • Ferdinando BedeschiClaudio Resta
    • Ferdinando BedeschiClaudio Resta
    • G11C11/00G11C7/10G11C7/00
    • G11C13/0004G11C11/5678G11C13/004G11C2013/0054G11C2211/5645G11C2213/79
    • A read circuit for reading at least one memory cell adapted to storing a logic value, the at least one memory cell including: a storage element made of a phase-change material; and an access element for coupling the storage element to the read circuit in response to a selection of the memory cell, the read circuit including: a sense current supply arrangement for supplying a sense current to the at least one memory cell; and at least one sense amplifier for determining the logic value stored in the memory cell on the basis of a voltage developing thereacross, the at least one sense amplifier comprising a voltage limiting circuit for limiting the voltage across the memory cell for preserving the stored logic value, wherein the voltage limiting circuit includes a current sinker for sinking a clamping current, which is subtracted from the sense current and depends on the stored logic value.
    • 一种用于读取适于存储逻辑值的至少一个存储单元的读取电路,所述至少一个存储单元包括:由相变材料制成的存储元件; 以及用于响应于所述存储单元的选择将所述存储元件耦合到所述读取电路的访问元件,所述读取电路包括:用于向所述至少一个存储器单元提供感测电流的感测电流供应装置; 以及至少一个读出放大器,用于基于在其上形成的电压来确定存储在存储器单元中的逻辑值,所述至少一个读出放大器包括用于限制存储器单元两端的电压的电压限制电路,用于保存所存储的逻辑值 其中所述电压限制电路包括用于吸收钳位电流的电流沉降片,其从所述感测电流中减去并且取决于所存储的逻辑值。