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1. 发明授权

US09245841B2 Semiconductor device and fabricating process for the same 有权
标题翻译：半导体器件及其制造工艺相同
公开(公告)号：US09245841B2
公开(公告)日：2016-01-26
申请号：US13553535
申请日：2012-07-19
申请人： Chien-Hua Huang , Chung-Ju Lee , Tsung-Min Huang
发明人： Chien-Hua Huang , Chung-Ju Lee , Tsung-Min Huang
IPC分类号： H01L29/08 , H01L35/24 , H01L51/00 , H01L23/522 , H01L23/532 , H01L21/768
CPC分类号： H01L21/76834 , H01L21/02123 , H01L21/31105 , H01L21/76804 , H01L21/76813 , H01L21/76831 , H01L21/76832 , H01L21/76867 , H01L21/76897 , H01L21/76898 , H01L23/5226 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device and a fabricating process for the same are provided. The semiconductor device includes a base layer having a part of a reactive material; and a self-assembled protecting layer of a self-assembled molecule reacting with the reactive material formed over the part.
摘要翻译：提供了一种半导体器件及其制造方法。半导体器件包括具有一部分反应性材料的基底层; 以及自组装分子与在该部分上形成的反应性材料反应的自组装保护层。

2. 发明授权

US08883646B2 Self-assembled monolayer for pattern formation 有权
标题翻译：自组装单层图案形成
公开(公告)号：US08883646B2
公开(公告)日：2014-11-11
申请号：US13567250
申请日：2012-08-06
申请人： Tsung-Min Huang , Chung-Ju Lee , Chien-Hua Huang
发明人： Tsung-Min Huang , Chung-Ju Lee , Chien-Hua Huang
IPC分类号： H01L21/311
CPC分类号： H01L21/0338 , H01L21/0332 , H01L21/0337 , H01L21/31144 , H01L21/76816
摘要： The present disclosure is directed to a process for the fabrication of a semiconductor device. In some embodiments the semiconductor device comprises a patterned surface. The pattern can be formed from a self-assembled monolayer. The disclosed process provides self-assembled monolayers which can be deposited quickly, thereby increasing production throughput and decreasing cost, as well as providing a pattern having substantially uniform shape.
摘要翻译：本公开涉及制造半导体器件的方法。在一些实施例中，半导体器件包括图案化表面。该图案可以由自组装单层形成。所公开的方法提供可以快速沉积的自组装单层，从而增加生产量和降低成本，以及提供具有基本均匀形状的图案。

3. 发明申请

US20130221534A1 Through Silicon Via Layout Pattern 有权
标题翻译：通过硅通布局图案
公开(公告)号：US20130221534A1
公开(公告)日：2013-08-29
申请号：US13478815
申请日：2012-05-23
申请人： Sun-Rong Jan , Che-Yu Yeh , Chee Wee Liu , Chien-Hua Huang , Bing J. Sheu
发明人： Sun-Rong Jan , Che-Yu Yeh , Chee Wee Liu , Chien-Hua Huang , Bing J. Sheu
IPC分类号： H01L23/498
CPC分类号： H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device comprises a substrate with a first side and a second side, wherein a plurality of active circuits are formed adjacent to the first side of the substrate and a plurality of through silicon vias arranged in a polygon shape and extending from the first side of to the second side, wherein the polygon shape has more than six sides, and wherein each through silicon via is placed at a corresponding apex of the polygon shape.
摘要翻译：半导体器件包括具有第一侧和第二侧的衬底，其中在衬底的第一侧附近形成多个有源电路，并且多个通孔布置成多边形并从第一侧延伸的多个通孔硅通孔到所述第二面，其中所述多边形形状具有六个以上的边，并且其中每个通过硅通孔被放置在所述多边形形状的相应顶点处。

4. 发明授权

US07235997B2 CMOS leakage current meter 有权
标题翻译： CMOS漏电流表
公开(公告)号：US07235997B2
公开(公告)日：2007-06-26
申请号：US11039743
申请日：2005-01-19
申请人： Chien-Hua Huang
发明人： Chien-Hua Huang
IPC分类号： G01R31/26
CPC分类号： G01R19/0092 , G01R31/2621 , G01R31/275
摘要： A leakage current detection circuit includes a first field effect transistor, the transistor configured to be biased to provide a leakage current, and a first current mirror in communication with the transistor operable to detect the leakage current from the transistor when the transistor is biased to provide the leakage current.
摘要翻译：泄漏电流检测电路包括第一场效应晶体管，晶体管被配置为偏置以提供漏电流;以及第一电流镜，其与晶体管连通，可操作以在晶体管被偏置以提供时检测来自晶体管的漏电流漏电流。

5. 发明授权

US07110313B2 Multiple-time electrical fuse programming circuit 有权
标题翻译：多次电熔丝编程电路
公开(公告)号：US07110313B2
公开(公告)日：2006-09-19
申请号：US11028839
申请日：2005-01-04
申请人： Chien-Hua Huang
发明人： Chien-Hua Huang
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C11/5692 , G11C17/165 , G11C17/18 , G11C29/02 , G11C29/027 , G11C29/4401
摘要： A multiple-time electrical fuse programming circuit is described. The circuit includes a programming counter to record the number of programmings, a blowing reference voltage generator to generate a blowing voltage reference wherein the fuse resistance after programming is determined by the blowing voltage reference, at least one self-controlled programmable fuses which includes a programmable fuse and a control circuit. The multiple-time electrical fuse programming circuit also has a fuse detection reference generator and a high voltage power source.
摘要翻译：描述了多次电熔丝编程电路。电路包括用于记录编程次数的编程计数器，用于产生吹风参考电压发生器的吹风参考电压发生器，其中编程之后的熔丝电阻由吹扫参考电压确定，至少一个自编程保险丝，其包括可编程保险丝和控制电路。多次电熔丝编程电路还具有熔丝检测参考发生器和高压电源。

6. 发明申请

US20060203600A1 Low power word line control circuits with boosted voltage output for semiconductor memory 有权
标题翻译：具有升压电压输出的半导体存储器的低功率字线控制电路
公开(公告)号：US20060203600A1
公开(公告)日：2006-09-14
申请号：US11264041
申请日：2005-10-31
申请人： Chung-Cheng Chou , Chien-Hua Huang , Hau-Tai Shieh , Tsai-Hsin Lai
发明人： Chung-Cheng Chou , Chien-Hua Huang , Hau-Tai Shieh , Tsai-Hsin Lai
IPC分类号： G11C8/00
CPC分类号： G11C5/145 , G11C8/08
摘要： A word line control device has a word line driver for deactivating and activating a word line to control access to a memory cell, and a voltage coupling device for coupling voltages to the word line driver.
摘要翻译：字线控制装置具有用于禁用和激活字线以控制对存储器单元的访问的字线驱动器，以及用于将电压耦合到字线驱动器的电压耦合装置。

7. 发明申请

US20060045044A1 Mobile terminal 有权
标题翻译：移动终端
公开(公告)号：US20060045044A1
公开(公告)日：2006-03-02
申请号：US11014278
申请日：2004-12-16
申请人： Li-Chi Chiu , Chien-Hua Huang , Shou-Tsai Chen
发明人： Li-Chi Chiu , Chien-Hua Huang , Shou-Tsai Chen
IPC分类号： H04Q7/00
CPC分类号： H04W52/0254 , Y02D70/00
摘要： A mobile terminal includes a power managing unit coupled to a control unit, and a switch unit coupled to the control unit and the power managing unit. The switch unit is operable so as to enable the power managing unit to supply electric power to the control unit. The switch unit is further operable so as to enable the control unit to perform one of controlling the power managing unit to stop supply of electric power thereto and a predetermined operation in response to duration of user actuation of the switch unit.
摘要翻译：移动终端包括耦合到控制单元的电源管理单元和耦合到控制单元和电源管理单元的开关单元。开关单元可操作以使得电源管理单元能够向控制单元提供电力。开关单元进一步可操作，以使得控制单元能够执行控制功率管理单元之一以停止对其的电力供应和响应于用户致动开关单元的持续时间的预定操作。

8. 发明授权

US06995601B2 Fuse state detection circuit 有权
标题翻译：保险丝状态检测电路
公开(公告)号：US06995601B2
公开(公告)日：2006-02-07
申请号：US10758144
申请日：2004-01-14
申请人： Chien-Hua Huang , Chen-Hui Hsieh
发明人： Chien-Hua Huang , Chen-Hui Hsieh
IPC分类号： G01H37/76
CPC分类号： G11C17/18
摘要： A fuse state detection circuit (300) has a reference circuit part (302, 302′) and a fuse detection circuit part (308, 308′), the reference circuit part (302, 302′) having a fuse (304, 304′) identical to a fuse (306, 306′) under detection. A reference voltage is between a voltage of a blown fuse (306, 306′) under detection and a voltage of an un-blown fuse (306, 306′) under detection, thus distinguishing a blown state of the fuse (306, 306′) under detection from an un-blown state of the fuse (306, 306′) under detection.
摘要翻译：熔丝状态检测电路（300）具有参考电路部分（302,302'）和熔丝检测电路部分（308,308'），参考电路部分（302,302'）具有熔丝（304,304'），）与检测到的保险丝（306,306'）相同。参考电压在被检测的熔断熔丝（306,306'）的电压和被检测的未熔断的熔丝（306,306'）的电压之间，从而区分熔丝（306,306'）的熔断状态，）在被检测的熔断器（306,306'）的未熔断状态下被检测。

9. 发明授权

US09012967B2 1T MIM memory for embedded RAM application in soc 有权
标题翻译： 1T MIM存储器，用于soc中的嵌入式RAM应用
公开(公告)号：US09012967B2
公开(公告)日：2015-04-21
申请号：US13369894
申请日：2012-02-09
申请人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
发明人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
IPC分类号： H01L27/108 , H01L29/94 , H01L27/02
CPC分类号： H01L27/10897 , H01L27/0207 , H01L27/10852 , H01L27/10894
摘要： Embedded memories. The devices include a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, and a plurality of capacitors. The substrate comprises transistors. The first dielectric layer, embedding first and second conductive plugs electrically connecting the transistors therein, overlies the substrate. The second dielectric layer, comprising a plurality of capacitor openings exposing the first conductive plugs, overlies the first dielectric layer. The capacitors comprise a plurality of bottom plates, respectively disposed in the capacitor openings, electrically connecting the first conductive plugs, a plurality of capacitor dielectric layers respectively overlying the bottom plates, and a top plate, comprising a top plate opening, overlying the capacitor dielectric layers. The top plate opening exposes the second dielectric layer, and the top plate is shared by the capacitors.
摘要翻译：嵌入式记忆这些器件包括衬底，第一介电层，第二电介质层，第三电介质层和多个电容器。衬底包括晶体管。第一介电层，嵌入电连接其中的晶体管的第一和第二导电插塞覆盖在基板上。包括暴露第一导电插塞的多个电容器开口的第二电介质层覆盖在第一电介质层上。电容器包括分别设置在电容器开口中的多个底板，电连接第一导电插塞，分别覆盖在底板上的多个电容器电介质层，以及顶板，包括覆盖电容器电介质的顶板开口层。顶板开口暴露第二电介质层，并且顶板由电容器共享。

10. 发明授权

US08266862B2 Prefabricated wall/floor panel 有权
标题翻译：预制墙/地板
公开(公告)号：US08266862B2
公开(公告)日：2012-09-18
申请号：US12779043
申请日：2010-05-13
申请人： Chien-Hua Huang
发明人： Chien-Hua Huang
IPC分类号： E04B2/00
CPC分类号： E04C2/044
摘要： A prefabricated wall or floor panel includes a rectangular concrete section comprising a projection along one side, a recess along the other side, the recessing being complementary to the projection, a protrusion along one end, a trough along the other end, the trough being complementary to the protrusion, channels each having one end terminated at one end and the other end terminated at the other end, a first groove on each of one end and the other end extending from one side to the other side by passing the mouths of the channels, and a second groove on either side extending from one end to the other end; a rectangular surface board formed integrally with an outer surface of the concrete section; and an interconnection comprising a transverse part of and spaced longitudinal tubes each adapted to fit into the channel to connect two adjacent prefabricated components together.
摘要翻译：预制墙或地板镶板包括矩形混凝土部分，其包括沿着一侧的突起，沿着另一侧的凹部，所述凹部与所述突起互补，沿着一端的突起，沿着另一端的槽，所述槽是互补的突出部分，每个具有一端终止于一端的通道，另一端终止于另一端，通过使通道的嘴部通过一端而另一端的另一端的第一凹槽从一侧延伸到另一侧和从一端延伸到另一端的任一侧上的第二槽; 与混凝土部分的外表面一体形成的矩形表面板; 以及包括横向部分和间隔开的纵向管的互连，每个管适于嵌入通道以将两个相邻的预制构件连接在一起。

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