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1. 发明授权

US07375540B2 Process monitor for monitoring and compensating circuit performance 有权
标题翻译：用于监控和补偿电路性能的过程监控
公开(公告)号：US07375540B2
公开(公告)日：2008-05-20
申请号：US10963639
申请日：2004-10-14
申请人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
发明人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
IPC分类号： G01R31/02 , G01R31/00
CPC分类号： H01L22/20 , G01R31/2607 , G01R31/30 , G01R31/31723 , H03F3/211 , H04N5/4446 , H04N5/52 , H04N7/102
摘要： A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations.
摘要翻译：提供了一种用于监测和补偿操作电路的性能的方法和系统。该系统包括一个或多个集成电路芯片和控制器。每个集成电路芯片包括一个或多个操作电路，每个操作电路具有至少一个可控电路参数。每个集成电路芯片还包括至少部分地构建在其上的过程监控模块。控制器耦合到每个过程监控模块和每个操作电路。控制器包括用于基于从存储在存储器中的过程监视模块和操作电路相关数据获得的数据来评估操作电路的性能的逻辑。基于评估，控制器确定是否存在与电路的期望或最佳性能的任何偏差。如果存在偏差，则控制器产生控制信号以启动对运算电路的调整以补偿偏差。

2. 发明授权

US07139547B2 Integrated direct conversion satellite tuner 有权
公开(公告)号：US07139547B2
公开(公告)日：2006-11-21
申请号：US09995695
申请日：2001-11-29
申请人： Myles Wakayama , Dana Vincent Laub , Frank Carr , Afshin Mellati , David S. P. Ho , Hsiang-Bin Lee , Chun-Ying Chen , James Y. C. Chang , Lawrence M. Burns , Young Joon Shin , Patrick Pai , Iconomos A. Koullias , Ron Lipka , Luke Thomas Steigerwald , Alexandre Kral
发明人： Myles Wakayama , Dana Vincent Laub , Frank Carr , Afshin Mellati , David S. P. Ho , Hsiang-Bin Lee , Chun-Ying Chen , James Y. C. Chang , Lawrence M. Burns , Young Joon Shin , Patrick Pai , Iconomos A. Koullias , Ron Lipka , Luke Thomas Steigerwald , Alexandre Kral
IPC分类号： H04B1/28
CPC分类号： H03H11/04 , H03D3/008 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/165 , H03D2200/0025 , H03D2200/0043 , H03D2200/0047 , H04B1/30
摘要： A direct conversion satellite tuner is fully integrated on a common substrate. The integrated tuner receives an RF signal having a plurality of channels and down-converts a selected channel directly to baseband for further processing. The integrated tuner includes on-chip local oscillator generation, tunable baseband filters, and DC Offset cancellation. The integrated tuner can be implemented in a completely differential I/Q configuration for improved electrical performance. The entire direct conversion satellite tuner can be fabricated on a single semiconductor substrate using standard CMOS processing, with minimal off-chip components. The tuner configuration described herein is not limited to processing TV signals, and can be utilized to down-convert other RF signals to an IF frequency or baseband.

3. 发明授权

US07092043B2 Fully integrated tuner architecture 有权
标题翻译：完全集成的调谐器架构
公开(公告)号：US07092043B2
公开(公告)日：2006-08-15
申请号：US09439101
申请日：1999-11-12
申请人： Pieter Vorenkamp , Klaas Bult , Frank Carr , Christopher M. Ward , Ralph Duncan , Tom W. Kwan , James Y. C. Chang , Haideh Khorramabadi
发明人： Pieter Vorenkamp , Klaas Bult , Frank Carr , Christopher M. Ward , Ralph Duncan , Tom W. Kwan , James Y. C. Chang , Haideh Khorramabadi
IPC分类号： H04N5/455
CPC分类号： H03D3/18 , H01F17/0006 , H01F17/0013 , H01F27/34 , H01F27/40 , H01F27/42 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/0251 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/04 , H03B5/364 , H03D7/161 , H03D7/18 , H03F1/26 , H03F1/3211 , H03F3/195 , H03F3/45183 , H03F3/45188 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/372 , H03F2200/447 , H03F2200/63 , H03F2203/45264 , H03F2203/45286 , H03G1/0023 , H03G1/0029 , H03G3/3052 , H03H7/25 , H03H11/04 , H03H11/1291 , H03H11/53 , H03H11/54 , H03H19/004 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H03L7/183 , H03L7/23 , H03L2207/06 , H01L2924/00
摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
摘要翻译：描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。接收机前端提供可编程衰减和可编程增益低噪声放大器。频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。过滤器调谐和电感Q补偿温度在芯片上执行。滤波器采用多轨螺旋电感。使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。结合滤波，频率规划提供了额外的镜像抑制。片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。差分晶体振荡器有利地用作频率参考。差分信号传输有利地用于整个接收机。

4. 发明授权

US07088981B2 Apparatus for reducing flicker noise in a mixer circuit 有权
公开(公告)号：US07088981B2
公开(公告)日：2006-08-08
申请号：US09995690
申请日：2001-11-29
申请人： James Y. C. Chang
发明人： James Y. C. Chang
IPC分类号： H04B1/26
CPC分类号： H03H11/04 , H03D3/008 , H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/165 , H03D2200/0025 , H03D2200/0043 , H03D2200/0047 , H04B1/30
摘要： A differential mixer includes DC currents that reduce flicker noise in the mixer circuit without increasing local oscillator drive requirements. The differential mixer circuit includes an RF transconductance circuit and a local oscillator (LO) switching circuit. The RF transconductance circuit converts a differential RF input signal to a differential RF current. The LO switching circuit commutates the differential RF input signal according to a local oscillator signal to frequency translate the RF input signal. The DC currents or bleeder currents are added directly to the field effect transistors in the RF transconductance circuit, which reduces the flicker noise produced by the mixer. The DC currents do not pass through the FETs in the LO switching circuit so there is no increase in the LO drive requirements.

5. 发明授权

US06885275B1 Multi-track integrated spiral inductor 有权
标题翻译：多轨集成螺旋电感
公开(公告)号：US06885275B1
公开(公告)日：2005-04-26
申请号：US09493942
申请日：2000-01-28
申请人： James Y. C. Chang
发明人： James Y. C. Chang
IPC分类号： H01F17/00 , H01L23/522 , H01L27/02 , H01L27/08 , H03B5/12 , H03B5/36 , H03D7/16 , H03D7/18 , H03G1/00 , H03H11/12 , H03J1/00 , H03J3/04 , H03J3/08 , H03J3/18 , H03L7/10 , H03L7/23 , H01F5/00
CPC分类号： H03L7/23 , H01F17/0006 , H01F17/0013 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/364 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H01L2924/00
摘要： An integrated circuit inductor includes a spiral pattern disposed upon a substrate. The track of the spiral is divided into multiple tracks to form a multi-track inductor. The individual tracks are disposed side by side and in different layers. Tracks that are aligned vertically are coupled by feed throughs, or vias. Multiple vias are used along the length of each of the multiple tracks. Tracks disposed in the same layer are joined together at their beginning, and at their termination. A patterned shield is fabricated from conductive fingers of n+ salicided material that is separated by non conducting polysilicon that fills the gaps between the fingers. The conductive fingers are coupled together in groups, which are in turn tied to a single point ground. In tying the groups together, a gap in the conducting path is provided to prevent ground loop currents. The shield is disposed between the multi-track inductor and the substrate.
摘要翻译：集成电路电感器包括设置在基板上的螺旋图案。螺旋的轨迹被分成多个轨道以形成多轨电感器。各个轨道并排设置在不同的层中。垂直对齐的轨道通过馈通或通孔耦合。沿着多个轨道的每一个的长度使用多个通孔。设置在同一层中的轨道在其开始并在其终止时连接在一起。图案化屏蔽由n +盐水化材料的导电指状物制成，其由填充指状物之间的间隙的非导电多晶硅分离。导电指状物被组合在一起，它们又被连接到单点接地。在将组合在一起时，提供导通路径中的间隙以防止接地回路电流。屏蔽设置在多轨电感器和衬底之间。

6. 发明授权

US07843205B2 Process monitor for monitoring an integrated circuit chip 有权
标题翻译：用于监控集成电路芯片的过程监视器
公开(公告)号：US07843205B2
公开(公告)日：2010-11-30
申请号：US12261833
申请日：2008-10-30
申请人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
发明人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
IPC分类号： G01R31/02
CPC分类号： H01L22/20 , G01R31/2607 , G01R31/30 , G01R31/31723 , H03F3/211 , H04N5/4446 , H04N5/52 , H04N7/102
摘要： A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.
摘要翻译：一种用于监控集成电路（IC）芯片的系统或装置，包括：感测电路，其至少部分地构造在IC芯片上并且被配置为产生一个或多个感测信号，每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块，被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号，每一个表示所述感测信号中相应的一个感测信号。控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

7. 发明授权

US07821280B2 Process monitor for monitoring and compensating circuit performance 有权
标题翻译：用于监控和补偿电路性能的过程监控
公开(公告)号：US07821280B2
公开(公告)日：2010-10-26
申请号：US12110229
申请日：2008-04-25
申请人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
发明人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
IPC分类号： G01R31/02 , G01R31/00
CPC分类号： H01L22/20 , G01R31/2607 , G01R31/30 , G01R31/31723 , H03F3/211 , H04N5/4446 , H04N5/52 , H04N7/102
摘要： A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations.
摘要翻译：提供了一种用于监测和补偿操作电路的性能的方法和系统。该系统包括一个或多个集成电路芯片和控制器。每个集成电路芯片包括一个或多个操作电路，每个操作电路具有至少一个可控电路参数。每个集成电路芯片还包括至少部分地构建在其上的过程监控模块。控制器耦合到每个过程监控模块和每个操作电路。控制器包括用于基于从存储在存储器中的过程监视模块和操作电路相关数据获得的数据来评估操作电路的性能的逻辑。基于评估，控制器确定是否存在与电路的期望或最佳性能的任何偏差。如果存在偏差，则控制器产生控制信号以启动对运算电路的调整以补偿偏差。

8. 发明授权

US07449908B2 Process monitor for monitoring an integrated circuit chip 有权
标题翻译：用于监控集成电路芯片的过程监视器
公开(公告)号：US07449908B2
公开(公告)日：2008-11-11
申请号：US10647472
申请日：2003-08-26
申请人： Lawrence M Burns , Leonard Dauphinee , Ramon A Gomez , James Y. C. Chang
发明人： Lawrence M Burns , Leonard Dauphinee , Ramon A Gomez , James Y. C. Chang
IPC分类号： G01R31/02
CPC分类号： H01L22/20 , G01R31/2607 , G01R31/30 , G01R31/31723 , H03F3/211 , H04N5/4446 , H04N5/52 , H04N7/102
摘要： A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.
摘要翻译：用于监控集成电路（IC）芯片的系统或装置包括：感测电路，至少部分地构造在IC芯片上并被配置为产生一个或多个感测信号，每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块，被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号，每一个表示所述感测信号中相应的一个感测信号。控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

9. 发明授权

US08432180B2 Process monitor for monitoring an integrated circuit chip 有权
标题翻译：用于监控集成电路芯片的过程监视器
公开(公告)号：US08432180B2
公开(公告)日：2013-04-30
申请号：US12951877
申请日：2010-11-22
申请人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
发明人： Lawrence M. Burns , Leonard Dauphinee , Ramon A. Gomez , James Y. C. Chang
IPC分类号： G01R31/02
CPC分类号： H01L22/20 , G01R31/2607 , G01R31/30 , G01R31/31723 , H03F3/211 , H04N5/4446 , H04N5/52 , H04N7/102
摘要： A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.
摘要翻译：用于监控集成电路（IC）芯片的系统或装置包括：感测电路，至少部分地构造在IC芯片上并被配置为产生一个或多个感测信号，每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块，被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号，每一个表示所述感测信号中相应的一个感测信号。控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

10. 发明授权

US08227892B2 Multi-track integrated circuit inductor 有权
标题翻译：多轨集成电路电感
公开(公告)号：US08227892B2
公开(公告)日：2012-07-24
申请号：US12731828
申请日：2010-03-25
申请人： James Y. C. Chang
发明人： James Y. C. Chang
IPC分类号： H01L27/08
CPC分类号： H03L7/23 , H01F17/0006 , H01F17/0013 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/364 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H01L2924/00
摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
摘要翻译：描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。接收机前端提供可编程衰减和可编程增益低噪声放大器。频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。过滤器调谐和电感Q补偿温度在芯片上执行。滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.使用本地振荡器调谐滤波器以调整替代滤波器，以及在滤波器组件值期间频率缩放至正被调谐的滤波器的滤波器。结合滤波，频率规划提供了额外的镜像抑制。片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。差分晶体振荡器有利地用作频率参考。差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。还提供每个引脚上的分流器，以放电ESD积聚。分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。

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