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    • 2. 发明申请
    • Protective circuit for a thin film transistor and a liquid crystal display device
    • 薄膜晶体管和液晶显示装置的保护电路
    • US20070001949A1
    • 2007-01-04
    • US11514759
    • 2006-09-01
    • Yoshiaki Nakazaki
    • Yoshiaki Nakazaki
    • G09G3/36
    • H01L27/1214G02F1/136204G09G5/006H01L2924/0002H01L2924/00
    • An input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device and including in one embodiment a resistance provided between an I/O terminal pad and an I/O primary stage thin film transistor, a wiring connecting the I/O terminal pad with the resistance, and two I/O protective thin film transistors connected in series between a ground terminal and a power source terminal. The above wiring is connected with each joint portion of the two I/O protective thin film transistors and, each of the two I/O protective thin film transistors has p-type substrate potential fixing terminals and n-type substrate potential fixing terminals, which are connected with each of the channel layers of the I/O protective thin film transistors, and p-type substrate potential fixing terminals and n-type substrate potential fixing terminals are connected with the ground terminals.
    • 一种输入输出(I / O)保护电路,其具有用于液晶显示装置的更稳定的I / O保护功能,并且在一个实施例中包括在I / O端子焊盘和I / O初级薄层之间提供的电阻 薄膜晶体管,将I / O端子焊盘与电阻连接的布线以及串联在接地端子和电源端子之间的两个I / O保护薄膜晶体管。 上述布线与两个I / O保护薄膜晶体管的每个接合部分连接,并且两个I / O保护薄膜晶体管中的每一个具有p型衬底电位固定端子和n型衬底电势固定端子,其中 与I / O保护薄膜晶体管的每个沟道层连接,p型衬底电位固定端子和n型衬底电位固定端子与接地端子连接。
    • 8. 发明授权
    • Protection circuit for input and output of liquid crystal display
    • 液晶显示器输入输出保护电路
    • US07138987B2
    • 2006-11-21
    • US10401311
    • 2003-03-26
    • Yoshiaki Nakazaki
    • Yoshiaki Nakazaki
    • H01L23/62
    • H01L27/1214G02F1/136204G09G5/006H01L2924/0002H01L2924/00
    • There is provided an input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device.An IO protective circuit includes: a resistance 13 provided between an I/O terminal pad 11 and an I/O primary stage thin film transistor 12, a wiring connecting the I/O terminal pad 11 with the resistance 13, and two I/O protective thin film transistors 14 connected in series between a ground terminal 20 and a power source terminal 21. The above wiring is connected with each joint portion of the two I/O protective thin film transistors 14 and 15, each of the two I/O protective thin film transistors 14, 15 has p-type substrate potential fixing terminals 16, 18 and n-type substrate potential fixing terminals 17, 19, which are connected with each of the channel layers of the I/O protective thin film transistors 14, 15, and p-type substrate potential fixing terminals 16, 18 and n-type substrate potential fixing terminals 17, 19 are connected with the ground terminals 20.
    • 提供了一种具有更稳定的I / O保护功能的输入输出(I / O)保护电路,用于液晶显示装置。 IO保护电路包括:设置在I / O端子焊盘11和I / O初级级薄膜晶体管12之间的电阻13,将I / O端子焊盘11与电阻13连接的布线和两个I / O 保护薄膜晶体管14串联连接在接地端子20和电源端子21之间。 上述布线与两个I / O保护薄膜晶体管14和15的每个接合部分连接,两个I / O保护薄膜晶体管14,15中的每一个具有p型衬底电位固定端子16,18和n I型衬底电位固定端子17,19与I / O保护薄膜晶体管14,15的各个沟道层和p型衬底电位固定端子16,18连接,n型衬底电位固定 端子17,19与接地端子20连接。