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    • 3. 发明授权
    • LED fabrication via ion implant isolation
    • 通过离子注入隔离制造LED
    • US07943954B2
    • 2011-05-17
    • US12507288
    • 2009-07-22
    • Yifeng WuGerald H. NegleyDavid B. Slater, Jr.Valeri F. TsvetkovAlexander Suvorov
    • Yifeng WuGerald H. NegleyDavid B. Slater, Jr.Valeri F. TsvetkovAlexander Suvorov
    • H01L33/00
    • H01L33/32H01L33/305
    • A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.
    • 半导体发光二极管包括半导体衬底,衬底上的n型III族氮化物的外延层,n型外延层上的III族氮化物的p型外延层,并与n型外延层形成pn结, 型层和n型外延层上的电阻性氮化镓区,并且邻近p型外延层,用于电隔离pn结的部分。 在p型外延层上形成金属接触层。 在公开的方法实施例中,通过在p型外延区上形成注入掩模并将离子注入到p型外延区的一部分中以形成半绝缘的p型外延区的部分来形成电阻性氮化镓边界。 可以使用光致抗蚀剂掩模或足够厚的金属层作为植入物掩模。
    • 5. 发明申请
    • LED Fabrication via Ion Implant Isolation
    • 通过离子植入隔离制造LED
    • US20090309124A1
    • 2009-12-17
    • US12507288
    • 2009-07-22
    • Yifeng WuGerald H. NegleyDavid B. Slater, JR.Valeri F. TsvetkovAlexander Suvorov
    • Yifeng WuGerald H. NegleyDavid B. Slater, JR.Valeri F. TsvetkovAlexander Suvorov
    • H01L33/00
    • H01L33/32H01L33/305
    • A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.
    • 半导体发光二极管包括半导体衬底,衬底上的n型III族氮化物的外延层,n型外延层上的III族氮化物的p型外延层,并与n型外延层形成pn结, 型层和n型外延层上的电阻性氮化镓区,并且邻近p型外延层,用于电隔离pn结的部分。 在p型外延层上形成金属接触层。 在公开的方法实施例中,通过在p型外延区上形成注入掩模并将离子注入到p型外延区的一部分中以形成半绝缘的p型外延区的部分来形成电阻性氮化镓边界。 可以使用光致抗蚀剂掩模或足够厚的金属层作为植入物掩模。
    • 10. 发明申请
    • HIGH-TEMPERATURE ION IMPLANTATION APPARATUS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING HIGH-TEMPERATURE ION IMPLANTATION
    • 高温离子植入装置及使用高温离子植入制作半导体器件的方法
    • US20090197357A1
    • 2009-08-06
    • US12422826
    • 2009-04-13
    • Alexander Suvorov
    • Alexander Suvorov
    • H01L21/66H01J37/08H01L21/425
    • H01L21/67213Y10T16/469Y10T16/4707
    • A semiconductor device fabrication apparatus includes a load lock chamber, a loading assembly in the load lock chamber, and an ion implantation target chamber that is hermetically connected to the load lock chamber. The load lock chamber is configured to store a plurality of wafer plates. Each wafer plate respectively includes at least one semiconductor wafer thereon. The ion implantation target chamber is configured to implant an ion species into a semiconductor wafer on a currently loaded wafer plate. The loading assembly is also configured to load a next one of the plurality of wafer plates from the load lock chamber into the ion implantation target chamber. The loading assembly may be configured to load the next wafer plate from the load lock chamber into the ion implantation target chamber while substantially maintaining a current temperature within the ion implantation target chamber and/or without depressurizing the ion implantation target chamber. Related methods and devices are also discussed.
    • 半导体器件制造装置包括负载锁定室,负载锁定室中的装载组件和气密地连接到负载锁定室的离子注入目标室。 负载锁定室被配置为存储多个晶片板。 每个晶片板分别包括至少一个半导体晶片。 离子注入靶室被配置为将离子物质注入到当前装载的晶片板上的半导体晶片中。 装载组件还构造成将多个晶片板中的下一个从负载锁定室装载到离子注入目标室中。 加载组件可以被配置为将下一个晶片板从负载锁定室加载到离子注入靶室中,同时基本上保持离子注入靶室内的当前温度和/或不使离子注入靶室减压。 还讨论了相关的方法和设备。