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1. 发明授权

US10541306B2 Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device 有权
公开(公告)号：US10541306B2
公开(公告)日：2020-01-21
申请号：US13610993
申请日：2012-09-12
申请人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, Jr. , Anant Kumar Agarwal , Alexander Suvorov
发明人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, Jr. , Anant Kumar Agarwal , Alexander Suvorov
IPC分类号： H01L29/16 , H01L21/02 , H01L21/322 , H01L21/265
摘要： A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

2. 发明申请

US20140070230A1 USING A CARBON VACANCY REDUCTION MATERIAL TO INCREASE AVERAGE CARRIER LIFETIME IN A SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：使用碳减排材料在硅碳化硅半导体器件中增加平均载体寿命
公开(公告)号：US20140070230A1
公开(公告)日：2014-03-13
申请号：US13610993
申请日：2012-09-12
申请人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, JR. , Anant Kumar Agarwal
发明人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, JR. , Anant Kumar Agarwal
IPC分类号： H01L29/16 , H01L21/02
摘要： A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.
摘要翻译：公开了半导体管芯和半导体管芯的制造工艺。半导体管芯在衬底上具有衬底和碳化硅（SiC）外延结构。 SiC外延结构至少包括已经注入到SiC外延结构的表面中的第一N型SiC层，至少第一P型SiC层和碳空位还原材料。此外，SiC外延结构已经被退火以动员碳空位还原材料以弥散基本上贯穿整个SiC外延结构的碳原子，从而增加了SiC外延结构中的平均载流子寿命。

3. 发明授权

US10403722B2 Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device 有权
公开(公告)号：US10403722B2
公开(公告)日：2019-09-03
申请号：US13610993
申请日：2012-09-12
申请人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, Jr. , Anant Kumar Agarwal
发明人： Michael John O'Loughlin , Lin Cheng , Albert Augustus Burk, Jr. , Anant Kumar Agarwal
IPC分类号： H01L29/16 , H01L21/02 , H01L21/322 , H01L21/265
摘要： A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

4. 发明授权

US09349797B2 SiC devices with high blocking voltage terminated by a negative bevel 有权
标题翻译：具有高阻断电压的SiC器件由负斜角端接
公开(公告)号：US09349797B2
公开(公告)日：2016-05-24
申请号：US13366658
申请日：2012-02-06
申请人： Lin Cheng , Anant K. Agarwal , Michael John O'Loughlin , Albert Augustus Burk, Jr. , John Williams Palmour
发明人： Lin Cheng , Anant K. Agarwal , Michael John O'Loughlin , Albert Augustus Burk, Jr. , John Williams Palmour
IPC分类号： H01L29/06 , H01L29/10 , H01L29/36 , H01L29/732 , H01L29/739 , H01L29/74 , H01L29/745 , H01L29/78 , H01L29/861 , H01L29/16
CPC分类号： H01L29/7813 , H01L29/0615 , H01L29/0661 , H01L29/1004 , H01L29/1016 , H01L29/1095 , H01L29/1608 , H01L29/36 , H01L29/732 , H01L29/7397 , H01L29/74 , H01L29/745 , H01L29/861
摘要： The present disclosure relates to a Silicon Carbide (SiC) semiconductor device having both a high blocking voltage and low on-resistance. In one embodiment, the semiconductor device has a blocking voltage of at least 10 kilovolts (kV) and an on-resistance of less than 10 milli-ohms centimeter squared (mΩ·cm2) and even more preferably less than 5 mΩ·cm2. In another embodiment, the semiconductor device has a blocking voltage of at least 15 kV and an on-resistance of less than 15 mΩ·cm2 and even more preferably less than 7 mΩ·cm2. In yet another embodiment, the semiconductor device has a blocking voltage of at least 20 kV and an on-resistance of less than 20 mΩ·cm2 and even more preferably less than 10 mΩ·cm2. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), or a PIN diode.
摘要翻译：本发明涉及具有高阻断电压和低导通电阻的碳化硅（SiC）半导体器件。在一个实施例中，半导体器件具有至少10千伏（kV）的阻断电压和小于10毫欧平方厘米（mΩ·cm 2·cm 2）的导通电阻，甚至更优选小于5mΩ 。在另一个实施例中，半导体器件具有至少15kV的阻断电压和小于15mΩ/ cm 2，甚至更优选小于7mΩ的导通电阻。在另一个实施例中，半导体器件具有至少20kV的阻断电压和小于20mΩ的导通电阻，并且甚至更优选地小于10mΩ·cm 2。半导体器件优选但不一定是晶闸管，例如功率晶闸管，双极结晶体管（BJT），绝缘栅双极晶体管（IGBT）或PIN二极管。

5. 发明申请

US20130026493A1 SIC DEVICES WITH HIGH BLOCKING VOLTAGE TERMINATED BY A NEGATIVE BEVEL 有权
标题翻译：具有高阻塞电压的SIC器件由负极水平端接
公开(公告)号：US20130026493A1
公开(公告)日：2013-01-31
申请号：US13366658
申请日：2012-02-06
申请人： Lin Cheng , Anant K. Agarwal , Michael John O'Loughlin , Albert Augustus Burk, JR. , John Williams Palmour
发明人： Lin Cheng , Anant K. Agarwal , Michael John O'Loughlin , Albert Augustus Burk, JR. , John Williams Palmour
IPC分类号： H01L29/24
CPC分类号： H01L29/7813 , H01L29/0615 , H01L29/0661 , H01L29/1004 , H01L29/1016 , H01L29/1095 , H01L29/1608 , H01L29/36 , H01L29/732 , H01L29/7397 , H01L29/74 , H01L29/745 , H01L29/861
摘要： The present disclosure relates to a Silicon Carbide (SiC) semiconductor device having both a high blocking voltage and low on-resistance. In one embodiment, the semiconductor device has a blocking voltage of at least 10 kilovolts (kV) and an on-resistance of less than 10 milli-ohms centimeter squared (mΩ·cm2) and even more preferably less than 5 mΩ·cm2. In another embodiment, the semiconductor device has a blocking voltage of at least 15 kV and an on-resistance of less than 15 mΩ·cm2 and even more preferably less than 7 mΩ·cm2. In yet another embodiment, the semiconductor device has a blocking voltage of at least 20 kV and an on-resistance of less than 20 mΩ·cm2 and even more preferably less than 10 mΩ·cm2. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), or a PIN diode.
摘要翻译：本发明涉及具有高阻断电压和低导通电阻的碳化硅（SiC）半导体器件。在一个实施例中，半导体器件具有至少10千伏（kV）的阻断电压和小于10毫欧平方厘米（mΩ·cm 2·cm 2）的导通电阻，甚至更优选小于5mΩ 。在另一个实施例中，半导体器件具有至少15kV的阻断电压和小于15mΩ/ cm 2，甚至更优选小于7mΩ的导通电阻。在另一个实施例中，半导体器件具有至少20kV的阻断电压和小于20mΩ的导通电阻，并且甚至更优选地小于10mΩ·cm 2。半导体器件优选但不一定是晶闸管，例如功率晶闸管，双极结晶体管（BJT），绝缘栅双极晶体管（IGBT）或PIN二极管。

6. 发明授权

US08052794B2 Directed reagents to improve material uniformity 有权
标题翻译：定向试剂，以提高材料均匀性
公开(公告)号：US08052794B2
公开(公告)日：2011-11-08
申请号：US11224374
申请日：2005-09-12
申请人： Joseph John Sumakeris , Michael James Paisley , Michael John O'Loughlin
发明人： Joseph John Sumakeris , Michael James Paisley , Michael John O'Loughlin
IPC分类号： C30B15/00 , C30B28/12
CPC分类号： C23C16/4584 , C23C16/45514 , C23C16/45563 , C30B25/02 , C30B25/12 , C30B25/14 , C30B29/36
摘要： A method for locally controlling the stoichiometry of an epitaxially deposited layer on a semiconductor substrate is provided. The method includes directing a first reactant gas and a doping gas across a top surface of a semiconductor substrate and directing a drive gas and a second reactant gas against the substrate separately from the first reactant gas in a manner that rotates the substrate while introducing the second reactant gas at an edge of the substrate to control each reactant separately, thereby compensating and controlling depletion effects and improving doping uniformity in resulting epitaxial layers on the substrate.
摘要翻译：提供了一种用于局部控制半导体衬底上的外延沉积层的化学计量的方法。该方法包括：引导第一反应气体和掺杂气体穿过半导体衬底的顶表面，并将驱动气体和第二反应气体以与第一反应气体分离的方式引导基板，同时引导第二反应气体在衬底的边缘处的反应气体，以分别控制每个反应物，由此补偿和控制耗尽效应并改善衬底上所得到的外延层中的掺杂均匀性。

7. 发明授权

US07230274B2 Reduction of carrot defects in silicon carbide epitaxy 有权
标题翻译：减少碳化硅外延中的胡萝卜缺陷
公开(公告)号：US07230274B2
公开(公告)日：2007-06-12
申请号：US10790406
申请日：2004-03-01
申请人： Michael John O'Loughlin , Joseph John Sumakeris
发明人： Michael John O'Loughlin , Joseph John Sumakeris
IPC分类号： H01L29/15 , H01L29/06
CPC分类号： C30B25/02 , C03B23/02 , C30B29/36 , H01L21/02019 , H01L21/30621
摘要： Single crystal silicon carbide epitaxial layer on an off-axis substrate are manufactured by placing the substrate in an epitaxial growth reactor, growing a first layer of epitaxial silicon carbide on the substrate, interrupting the growth of the first layer of epitaxial silicon carbide, etching the first layer of epitaxial silicon carbide to reduce the thickness of the first layer, and regrowing a second layer of epitaxial silicon carbide on the first layer of epitaxial silicon carbide. Carrot defects may be terminated by the process of interrupting the epitaxial growth process, etching the grown layer and regrowing a second layer of epitaxial silicon carbide. The growth interruption/etching/regrowth may be repeated multiple times. A silicon carbide epitaxial layer has at least one carrot defect that is terminated within the epitaxial layer. A semiconductor structure includes an epitaxial layer of silicon carbide on an off-axis silicon carbide substrate, and a carrot defect having a nucleation point in the vicinity of an interface between the substrate and the epitaxial layer and is terminated within the epitaxial layer.
摘要翻译：通过将衬底放置在外延生长反应器中，在衬底上生长第一层外延碳化硅，中断外延碳化硅的第一层的生长，蚀刻外延碳化硅的第一层，制造脱轴衬底上的单晶碳化硅外延层第一层外延碳化硅以减小第一层的厚度，以及在第一层外延碳化硅上再生第二层外延碳化硅。胡萝卜缺陷可以通过中断外延生长过程，蚀刻生长层和再生第二层外延碳化硅的过程来终止。生长中断/蚀刻/再生长可以重复多次。碳化硅外延层具有端接在外延层内的至少一个胡萝卜缺陷。半导体结构包括在偏轴碳化硅衬底上的碳化硅外延层和在衬底和外延层之间的界面附近具有成核点的胡萝卜缺陷，并且终止在外延层内。

8. 发明授权

US06958497B2 Group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures 有权
标题翻译：具有量子阱和超晶格的III族氮化物基发光二极管结构，基于III族氮化物的量子阱结构和基于III族氮化物的超晶格结构
公开(公告)号：US06958497B2
公开(公告)日：2005-10-25
申请号：US10140796
申请日：2002-05-07
申请人： David Todd Emerson , James Ibbetson , Michael John Bergmann , Kathleen Marie Doverspike , Michael John O'Loughlin , Howard Dean Nordby, Jr. , Amber Christine Abare
发明人： David Todd Emerson , James Ibbetson , Michael John Bergmann , Kathleen Marie Doverspike , Michael John O'Loughlin , Howard Dean Nordby, Jr. , Amber Christine Abare
IPC分类号： H01L33/06 , H01L33/32 , H01L29/22
CPC分类号： H01L33/06 , B82Y20/00 , H01L21/0237 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/02507 , H01L21/0254 , H01L33/32
摘要： A light emitting diode is provided having a Group III nitride based superlattice and a Group III nitride based active region on the superlattice. The active region has at least one quantum well structure. The quantum well structure includes a first Group III nitride based barrier layer, a Group III nitride based quantum well layer on the first barrier layer and a second Group III nitride based barrier layer. A Group III nitride based semiconductor device and methods of fabricating a Group III nitride based semiconductor device having an active region comprising at least one quantum well structure are provided. The quantum well structure includes a well support layer comprising a Group III nitride, a quantum well layer comprising a Group III nitride on the well support layer and a cap layer comprising a Group III nitride on the quantum well layer. A Group III nitride based semiconductor device is also provided that includes a gallium nitride based superlattice having at least two periods of alternating layers of InXGa1−XN and InYGa1−YN, where 0≦X
摘要翻译：在超晶格上提供了具有III族氮化物基超晶格和III族氮化物基活性区的发光二极管。有源区具有至少一个量子阱结构。量子阱结构包括第一III族氮化物基阻挡层，第一阻挡层上的基于III族氮化物的量子阱层和第二III族氮化物基阻挡层。提供III族氮化物基半导体器件以及制造具有包括至少一个量子阱结构的有源区的III族氮化物基半导体器件的方法。量子阱结构包括包含III族氮化物的阱支撑层，在阱支撑层上包含III族氮化物的量子阱层和在量子阱层上包含III族氮化物的覆盖层。还提供了一种III族氮化物基半导体器件，其包括具有至少两个交替层的In 1 N 1 Ga 1-X N和In 1 N的纳米氮基超晶格， SUB> Y 1-Y N，其中0 <= X <1且0 <= Y <1，X不等于Y.该半导体器件可以是发光二极管与III族氮化物基活性区。有源区可以是多量子阱有源区。

9. 发明授权

US08430960B2 Deposition systems and susceptor assemblies for depositing a film on a substrate 有权
标题翻译：用于在衬底上沉积膜的沉积系统和感受器组件
公开(公告)号：US08430960B2
公开(公告)日：2013-04-30
申请号：US11512800
申请日：2006-08-29
申请人： Joseph John Sumakeris , Michael James Paisley , Michael John O'Loughlin
发明人： Joseph John Sumakeris , Michael James Paisley , Michael John O'Loughlin
IPC分类号： C23C16/455 , C23C16/458 , C23C16/46 , C23C16/507 , C23F1/00 , H01L21/306 , C23C16/06 , C23C16/22
CPC分类号： C23C16/45519 , C23C16/4401 , C23C16/455 , C23C16/488
摘要： Parasitic deposits are controlled in a deposition system for depositing a film on a substrate, the deposition system of the type defining a reaction chamber for receiving the substrate and including a process gas in the reaction chamber and an interior surface contiguous with the reaction chamber. Such control is provided by flowing a buffer gas between the interior surface and at least a portion of the process gas to form a gas barrier layer such that the gas barrier layer inhibits contact between the interior surface and components of the process gas. A deposition system for depositing a film on a substrate using a process gas includes a reaction chamber adapted to receive the substrate and the process gas. The system further includes an interior surface contiguous with the reaction chamber. A buffer gas supply system is adapted to supply a flow of a buffer gas between the interior surface and at least a portion of the process gas such that the flow of the buffer gas forms a gas barrier layer to inhibit contact between the interior surface and components of the process gas when the process gas is disposed in the reaction chamber.
摘要翻译：寄生沉积物在用于在基底上沉积膜的沉积系统中进行控制，所述沉积系统的类型限定用于接收基底的反应室，并且在反应室中包括处理气体和与反应室邻接的内表面。通过在内表面和至少一部分处理气体之间流动缓冲气体以形成阻气层来提供这种控制，使得气体阻隔层抑制处理气体的内表面和组分之间的接触。用于使用工艺气体在衬底上沉积膜的沉积系统包括适于接收衬底和工艺气体的反应室。该系统还包括与反应室邻接的内表面。缓冲气体供应系统适于在内表面和处理气体的至少一部分之间提供缓冲气体流，使得缓冲气体的流动形成阻气层，以阻止内表面和部件之间的接触当处理气体设置在反应室中时，该工艺气体。

10. 发明授权

US09903046B2 Reduction of carrot defects in silicon carbide epitaxy 有权
公开(公告)号：US09903046B2
公开(公告)日：2018-02-27
申请号：US11745817
申请日：2007-05-08
申请人： Michael John O'Loughlin , Joseph John Sumakeris
发明人： Michael John O'Loughlin , Joseph John Sumakeris
IPC分类号： H01L21/302 , H01L21/461 , B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , C23F3/00 , C30B25/02 , C03B23/02 , H01L21/02 , H01L21/306 , C30B29/36
CPC分类号： C30B25/02 , C03B23/02 , C30B29/36 , H01L21/02019 , H01L21/30621
摘要： Single crystal silicon carbide epitaxial layer on an off-axis substrate are manufactured by placing the substrate in an epitaxial growth reactor, growing a first layer of epitaxial silicon carbide on the substrate, interrupting the growth of the first layer of epitaxial silicon carbide, etching the first layer of epitaxial silicon carbide to reduce the thickness of the first layer, and regrowing a second layer of epitaxial silicon carbide on the first layer of epitaxial silicon carbide. Carrot defects may be terminated by the process of interrupting the epitaxial growth process, etching the grown layer and regrowing a second layer of epitaxial silicon carbide. The growth interruption/etching/regrowth may be repeated multiple times. A silicon carbide epitaxial layer has at least one carrot defect that is terminated within the epitaxial layer. A semiconductor stricture includes an epitaxial layer of silicon carbide on an off-axis silicon carbide substrate, and a carrot defect having a nucleation point in the vicinity of an interface between the substrate and the epitaxial layer and is terminated within the epitaxial layer.

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