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1. 发明授权

US08875005B2 Systems and methods for low latency media defect detection 有权
公开(公告)号：US08875005B2
公开(公告)日：2014-10-28
申请号：US13368599
申请日：2012-02-08
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G06F11/00
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

2. 发明授权

US08949701B2 Systems and methods for low latency media defect detection 有权
标题翻译：用于低延迟介质缺陷检测的系统和方法
公开(公告)号：US08949701B2
公开(公告)日：2015-02-03
申请号：US13368599
申请日：2012-02-08
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G06F11/00
CPC分类号： G11B20/10509 , G11B20/10046 , G11B20/10268 , G11B20/10472 , G11B20/1816 , G11B27/36 , G11B2220/2516 , H04L27/0002
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。例如，公开了一种媒体缺陷检测系统，其包括从介质导出的数据输入，快速包络计算电路，其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路，其接收数据输入并基于数据输入提供慢衰减包络值，以及介质缺陷检测电路。媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值，计算快速衰减包络值与慢衰减包络值的比值，并至少部分地基于比较来确定缺陷输出比值到缺陷阈值。

3. 发明申请

US20100208574A1 Systems and Methods for Reduced Latency Loop Recovery 有权
标题翻译：减少延迟循环恢复的系统和方法
公开(公告)号：US20100208574A1
公开(公告)日：2010-08-19
申请号：US12371906
申请日：2009-02-16
申请人： Nayak Ratnakar Aravind , Richard Rauschmayer
发明人： Nayak Ratnakar Aravind , Richard Rauschmayer
IPC分类号： G11B3/00 , H03G3/10
CPC分类号： H03G3/30 , G11B20/10009 , G11B20/10027 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output. The level of amplification by the variable gain amplifier is based at least in part on the gain correction signal.
摘要翻译：本发明的各种实施例提供了用于在数据处理系统中减少等待时间反馈的系统和方法。例如，一些实施例提供了包括可变增益放大器，处理电路，数据检测器和误差信号计算电路的数据处理系统。可变增益放大器放大数据输入信号并提供放大信号。处理电路产生对应于放大信号的信号输出，并且包括条件乘法电路。条件乘法电路有条件地将输出的信号乘以增益校正信号，并将结果提供为临时输出。数据检测器将数据检测算法应用于信号输出，并提供理想的输出。误差信号计算电路至少部分地基于中间输出和理想输出的导数来产生增益校正信号。可变增益放大器的放大电平至少部分地基于增益校正信号。

4. 发明授权

US07957251B2 Systems and methods for reduced latency loop recovery 有权
标题翻译：降低延迟环路恢复的系统和方法
公开(公告)号：US07957251B2
公开(公告)日：2011-06-07
申请号：US12371906
申请日：2009-02-16
申请人： Nayak Ratnakar Aravind , Richard Rauschmayer
发明人： Nayak Ratnakar Aravind , Richard Rauschmayer
IPC分类号： G11B7/00
CPC分类号： H03G3/30 , G11B20/10009 , G11B20/10027 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output. The level of amplification by the variable gain amplifier is based at least in part on the gain correction signal.
摘要翻译：本发明的各种实施例提供了用于在数据处理系统中减少等待时间反馈的系统和方法。例如，一些实施例提供了包括可变增益放大器，处理电路，数据检测器和误差信号计算电路的数据处理系统。可变增益放大器放大数据输入信号并提供放大信号。处理电路产生对应于放大信号的信号输出，并且包括条件乘法电路。条件乘法电路有条件地将输出的信号乘以增益校正信号，并将结果提供为临时输出。数据检测器将数据检测算法应用于信号输出，并提供理想的输出。误差信号计算电路至少部分地基于中间输出和理想输出的导数来产生增益校正信号。可变增益放大器的放大电平至少部分地基于增益校正信号。

5. 发明申请

US20100074078A1 Systems and Methods for Low Latency Media Defect Detection 有权
标题翻译：低延迟介质缺陷检测系统与方法
公开(公告)号：US20100074078A1
公开(公告)日：2010-03-25
申请号：US12236148
申请日：2008-09-23
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G11B5/58
CPC分类号： G11B5/5565 , G11B5/59611 , G11B20/10037 , G11B20/1816 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。例如，公开了一种媒体缺陷检测系统，其包括从介质导出的数据输入，快速包络计算电路，其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路，其接收数据输入并基于数据输入提供慢衰减包络值，以及介质缺陷检测电路。媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值，计算快速衰减包络值与慢衰减包络值的比值，并至少部分地基于比较来确定缺陷输出比值到缺陷阈值。

6. 发明申请

US20130205185A1 Systems and Methods for Low Latency Media Defect Detection 有权
标题翻译：低延迟介质缺陷检测系统与方法
公开(公告)号：US20130205185A1
公开(公告)日：2013-08-08
申请号：US13368599
申请日：2012-02-08
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G06F11/07
CPC分类号： G11B20/10509 , G11B20/10046 , G11B20/10268 , G11B20/10472 , G11B20/1816 , G11B27/36 , G11B2220/2516 , H04L27/0002
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。例如，公开了一种媒体缺陷检测系统，其包括从介质导出的数据输入，快速包络计算电路，其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路，其接收数据输入并基于数据输入提供慢衰减包络值，以及介质缺陷检测电路。媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值，计算快速衰减包络值与慢衰减包络值的比值，并至少部分地基于比较来确定缺陷输出比值到缺陷阈值。

7. 发明授权

US08139457B2 Systems and methods for low latency media defect detection 有权
标题翻译：用于低延迟介质缺陷检测的系统和方法
公开(公告)号：US08139457B2
公开(公告)日：2012-03-20
申请号：US12236148
申请日：2008-09-23
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G11B20/18
CPC分类号： G11B5/5565 , G11B5/59611 , G11B20/10037 , G11B20/1816 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。例如，公开了一种媒体缺陷检测系统，其包括从介质导出的数据输入，快速包络计算电路，其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路，其接收数据输入并基于数据输入提供慢衰减包络值，以及介质缺陷检测电路。媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值，计算快速衰减包络值与慢衰减包络值的比值，并至少部分地基于比较来确定缺陷输出比值到缺陷阈值。

8. 发明授权

US08413029B2 Error correction capability adjustment of LDPC codes for storage device testing 失效
标题翻译：用于存储设备测试的LDPC码的纠错能力调整
公开(公告)号：US08413029B2
公开(公告)日：2013-04-02
申请号：US12402359
申请日：2009-03-11
申请人： Richard Rauschmayer , Hongwei Song
发明人： Richard Rauschmayer , Hongwei Song
IPC分类号： H03M13/03 , G11C29/00
CPC分类号： G11B20/1803 , G11B20/1816 , G11C29/028 , G11C29/42 , G11C2029/0411 , H03M13/1102
摘要： Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
摘要翻译：本文描述的方法和结构提供了用于调整LDPC纠错码的纠错能力。例如，一个实施例的系统包括适于对已经用LDPC纠错码编码的数据进行解码的解码器。该系统还包括通信地耦合到解码器并且适于在解码器解码之前估计数据中的位值的检测器。检测器还适于基于比特值估计改变比特值，以减少LDPC纠错码的纠错能力。误差校正能力的降低是可调节的，从而可以逐渐分析存储设备的扇区故障率。

9. 发明授权

US08174784B2 Systems and methods for inter-location control of storage access 有权
标题翻译：存储访问的位置间控制的系统和方法
公开(公告)号：US08174784B2
公开(公告)日：2012-05-08
申请号：US12527311
申请日：2007-10-30
申请人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
发明人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
IPC分类号： G11B5/09 , G11B5/596
CPC分类号： G11B5/09 , G11B20/10 , G11B20/10222 , G11B2020/1267 , G11B2020/1281 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a magnetic storage medium is disclosed that includes providing a location count indicating a location between a portion of a first servo data sector of a magnetic storage media and a portion of a second servo data sector of the magnetic storage media, and asserting an enable window signal based upon the location count.
摘要翻译：本发明的各种实施例提供了用于控制对磁存储介质的访问的系统和方法。作为一个示例，公开了一种用于控制对磁存储介质的访问的方法，其包括提供指示磁存储介质的第一伺服数据扇区的一部分与第二伺服数据扇区的部分之间的位置的位置计数磁存储介质，并且基于位置计数来确定使能窗口信号。

10. 发明申请

US20100185906A1 ERROR CORRECTION CAPABILITY ADJUSTMENT OF LDPC CODES FOR STORAGE DEVICE TESTING 失效
标题翻译：用于存储器件测试的LDPC码的错误校正能力调整
公开(公告)号：US20100185906A1
公开(公告)日：2010-07-22
申请号：US12402359
申请日：2009-03-11
申请人： Richard Rauschmayer , Hongwei Song
发明人： Richard Rauschmayer , Hongwei Song
IPC分类号： G11C29/04 , H03M13/35 , G06F11/10 , G06F11/22
CPC分类号： G11B20/1803 , G11B20/1816 , G11C29/028 , G11C29/42 , G11C2029/0411 , H03M13/1102
摘要： Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
摘要翻译：本文描述的方法和结构提供了用于调整LDPC纠错码的纠错能力。例如，一个实施例的系统包括适于对已经用LDPC纠错码编码的数据进行解码的解码器。该系统还包括通信地耦合到解码器并且适于在解码器解码之前估计数据中的位值的检测器。检测器还适于基于比特值估计改变比特值，以减少LDPC纠错码的纠错能力。误差校正能力的降低是可调节的，从而可以逐渐分析存储设备的扇区故障率。

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