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1. 发明授权

US5987634A Channel quality circuit in a sampled amplitude read channel 失效
标题翻译：通道质量电路采样振幅读通道
公开(公告)号：US5987634A
公开(公告)日：1999-11-16
申请号：US897339
申请日：1997-07-21
申请人： Richard T. Behrens , William G. Bliss , William R. Foland, Jr.
发明人： Richard T. Behrens , William G. Bliss , William R. Foland, Jr.
IPC分类号： G11B20/10 , G11C29/00
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037
摘要： A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons. A defect detection filter detects particular defects in the media. In order to predict the bit error rate of the storage system, the channel quality circuit accumulates noise auto-correlation data, confidence metrics from a sequence detector, and cross-correlation of expected sample errors with actual sample errors.
摘要翻译：一种信道质量电路，其被并入在磁存储系统中使用的采样幅度读取信道中，用于处理和累积来自各个读取信道分量的性能数据，其中，所述性能数据用于校准所述读取信道以在特定环境中操作，估计存储系统的误码率，并检测磁介质中的缺陷。信道质量电路产生写入存储系统的数字数据的测试模式。然后，当从存储系统读取测试图案时，信道质量电路从读取的信道分量累积性能数据。测试模式用于产生相对于读通道读取的样本的预期样本和预期样本误差。门控逻辑被编程为仅累积感兴趣的特定性能数据。信道质量电路计算自动和互相关，平方误差和阈值比较。缺陷检测滤波器检测介质中的特定缺陷。为了预测存储系统的误码率，信道质量电路将噪声自相关数据，序列检测器的置信度量度以及预期样本误差与实际样本误差的互相关累积。

2. 发明授权

US5771127A Sampled amplitude read channel employing interpolated timing recovery and a remod/demod sequence detector 失效
标题翻译：采用内插定时恢复的采样幅度读取通道和重构/解调序列检测器
公开(公告)号：US5771127A
公开(公告)日：1998-06-23
申请号：US681678
申请日：1996-07-29
申请人： David E. Reed , William R. Foland, Jr. , William G. Bliss , Richard T. Behrens , Lisa C. Sundell
发明人： David E. Reed , William R. Foland, Jr. , William G. Bliss , Richard T. Behrens , Lisa C. Sundell
IPC分类号： G11B20/10 , G11B20/14 , G11B5/09
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/1426
摘要： In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse. The error pattern detector comprises a peak error pattern detector and, if an error pattern is detected, a means for disabling the error pattern detector until the detected error pattern has been fully processed. The error detection validator checks the validity of a detected error event and, if valid, enables operation of the error corrector.
摘要翻译：在用于记录二进制数据的计算机磁盘存储系统中，采样幅度读取通道包括用于从位于盘存储介质上的读取头的模拟读取信号中异步采样脉冲的采样装置，用于产生同步采样值的内插定时恢复，以及序列检测器，用于从同步样本值检测二进制数据。序列检测器包括用于检测可能包含位错误的初步二进制序列的解调器，用于重新调制到估计样本值的再调制器，用于产生采样误差值的装置，用于检测位错误的误差模式检测器，错误检测验证器，以及用于校正位错误的纠错器。再调制器包括部分擦除电路，其补偿由位于主脉冲附近的次级脉冲引起的初级脉冲的幅度的非线性减小。误差模式检测器包括峰值误差模式检测器，并且如果检测到错误模式，则用于禁止错误模式检测器的装置，直到检测到的错误模式被完全处理为止。错误检测验证器检查检测到的错误事件的有效性，如果有效，则允许错误校正器的操作。

3. 发明授权

US5754353A Channel quality circuit in a sampled amplitude read channel 失效
公开(公告)号：US5754353A
公开(公告)日：1998-05-19
申请号：US340939
申请日：1994-11-17
申请人： Richard T. Behrens , William R. Foland, Jr.
发明人： Richard T. Behrens , William R. Foland, Jr.
IPC分类号： G11B5/09 , G11B20/10 , G11B20/18
CPC分类号： G11B5/09 , G11B20/10009 , G11B20/10037 , G11B20/10055 , G11B20/18 , G11B20/1816 , G11B20/182
摘要： A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons. A defect detection filter detects particular defects in the media. In order to predict the bit error rate of the storage system, the channel quality circuit accumulates noise auto-correlation data, confidence metrics from a sequence detector, and cross-correlation of expected sample errors with actual sample errors.

4. 发明授权

US5761212A Channel quality 失效
标题翻译：渠道质量
公开(公告)号：US5761212A
公开(公告)日：1998-06-02
申请号：US545965
申请日：1995-10-20
申请人： William R. Foland, Jr. , Richard T. Behrens , Alan J. Armstrong , Neal Glover
发明人： William R. Foland, Jr. , Richard T. Behrens , Alan J. Armstrong , Neal Glover
IPC分类号： G11B5/09 , G11B20/10 , G11B20/18 , G11C29/00
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/18 , G11B20/1816 , G11B20/182 , G11B5/09
摘要： A measurement circuit is provided to obtain data for monitoring the quality of performance from a digital read channel. Elements of the digital read channel including a sequence detector are incorporated into an integrated circuit together with the measurement circuit. The measurement circuit relates digitized samples of readback data from a magnetic storage device to surrounding samples so that particular samples can be collected in accordance with their surroundings. The circuit includes a programmable time window which can be repeatedly opened for data collection. The circuit is designed to collect various types of data including the bit error rate, sample value, squared sample error, squared gain error, squared timing error, and the occurrences of sample error when it is outside an acceptable programmable threshold. The measurement circuit includes a signal generator for producing a test pattern that is first stored and then read to produce the digitized readback sample values. The measurement circuit also includes a conversion circuit for converting the test pattern to a sequence of expected sample values in accordance with a state machine model of the sequence detector. The sample value error results from a comparison of the readback sample value to the expected sample value.
摘要翻译：提供测量电路以获得用于从数字读取通道监视性能的数据。包括序列检测器的数字读通道的元件与测量电路一起并入集成电路中。测量电路将来自磁存储装置的回读数据的数字化样本与周围样品相关联，使得可以根据其周围环境收集特定样品。该电路包括可重复打开以供数据采集的可编程时间窗口。电路设计用于收集各种类型的数据，包括误码率，采样值，平方采样误差，平方增益误差，平方定时误差，以及采样误差超出可接受的可编程阈值时的出现。测量电路包括用于产生测试图案的信号发生器，其首先被存储然后被读取以产生数字化的回读采样值。测量电路还包括根据序列检测器的状态机模型将测试图案转换成预期样本值序列的转换电路。样本值误差来自于回读样本值与预期样本值的比较。

5. 发明授权

US6005731A Channel quality circuit employing a test pattern generator in a sampled amplitude read channel for calibration 失效
标题翻译：信道质量电路采用采样幅度读取通道中的测试码型发生器进行校准
公开(公告)号：US6005731A
公开(公告)日：1999-12-21
申请号：US844174
申请日：1997-04-18
申请人： William R. Foland, Jr. , Richard T. Behrens , Alan J. Armstrong , Neal Glover
发明人： William R. Foland, Jr. , Richard T. Behrens , Alan J. Armstrong , Neal Glover
IPC分类号： G11B5/09 , G11B20/10 , G11B20/18
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/18 , G11B20/1816 , G11B20/182 , G11B5/09
摘要： A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons. A defect detection filter detects particular defects in the media. In order to predict the bit error rate of the storage system, the channel quality circuit accumulates noise auto-correlation data, confidence metrics from a sequence detector, and cross-correlation of expected sample errors with actual sample errors.
摘要翻译：一种信道质量电路，其被并入在磁存储系统中使用的采样幅度读取信道中，用于处理和累积来自各个读取信道分量的性能数据，其中，所述性能数据用于校准所述读取信道以在特定环境中操作，估计存储系统的误码率，并检测磁介质中的缺陷。信道质量电路产生写入存储系统的数字数据的测试模式。然后，当从存储系统读取测试图案时，信道质量电路从读取的信道分量累积性能数据。测试模式用于产生相对于读通道读取的样本的预期样本和预期样本误差。门控逻辑被编程为仅累积感兴趣的特定性能数据。信道质量电路计算自动和互相关，平方误差和阈值比较。缺陷检测滤波器检测介质中的特定缺陷。为了预测存储系统的误码率，信道质量电路将噪声自相关数据，序列检测器的置信度量度以及预期样本误差与实际样本误差的互相关累积。

6. 发明授权

US6108151A Sampled amplitude read channel for reading user data and embedded servo data from a magnetic medium 失效
标题翻译：采样幅度读通道，用于从磁介质读取用户数据和嵌入式伺服数据
公开(公告)号：US6108151A
公开(公告)日：2000-08-22
申请号：US846140
申请日：1997-04-25
申请人： Tyson Tuttle , Diwakar Vishakhadatta , Jerrel P. Hein , David R. Welland , David E. Reed , Richard T. Behrens , William G. Bliss , Paul M. Romano , Trent O. Dudley , Christopher P. Zook
发明人： Tyson Tuttle , Diwakar Vishakhadatta , Jerrel P. Hein , David R. Welland , David E. Reed , Richard T. Behrens , William G. Bliss , Paul M. Romano , Trent O. Dudley , Christopher P. Zook
IPC分类号： G11B5/012 , G11B5/09 , G11B5/55 , G11B5/58 , G11B5/596 , G11B19/28 , G11B20/10 , G11B20/12 , G11B20/14 , G11B15/12 , G11B21/02
CPC分类号： G11B20/10055 , G11B19/28 , G11B20/10009 , G11B20/10037 , G11B20/1403 , G11B5/012 , G11B5/09 , G11B5/5526 , G11B5/553 , G11B5/5547 , G11B5/58 , G11B5/59605 , G11B5/59622 , G11B5/59633 , G11B5/59688 , G11B20/1258 , G11B5/5534 , G11B5/5965
摘要： A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated binary sequence from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read head positioned over the disk storage medium. The read channel comprises a sampling device, such as an analog-to-digital converter (A/D), for sampling the analog read signal to generate the discrete time sample values and for sampling at least one other auxillary analog input signal, such as a servo control signal. In this manner, performance characteristics of the read channel can be measured, such as the driving current applied to the servo control voice coil motor (VCM), without requiring additional hardware.
摘要翻译：公开了一种采样幅度读取通道，用于通过从位于盘存储介质上的读取头的模拟读取信号中通过采样脉冲产生的离散时间采样值序列检测估计的二进制序列来读取记录在盘存储介质上的数据。读取通道包括采样装置，例如模拟 - 数字转换器（A / D），用于对模拟读取信号进行采样以产生离散时间采样值，并用于对至少一个其他辅助模拟输入信号进行采样，例如伺服控制信号。以这种方式，可以测量读取通道的性能特性，例如施加到伺服控制音圈电机（VCM）的驱动电流，而不需要额外的硬件。

7. 发明授权

US06646822B1 Sampled amplitude read channel employing pipelined reads to reduce the gap between sectors 失效
标题翻译：取样幅度读通道采用流水线读数，以减少扇区之间的差距
公开(公告)号：US06646822B1
公开(公告)日：2003-11-11
申请号：US08815894
申请日：1997-03-12
申请人： Tyson Tuttle , Diwakar Vishakhadatta , Jerrel P. Hein , David R. Welland , David E. Reed , Richard T. Behrens , William G. Bliss , Paul M. Romano , Trent O. Dudley , Christopher P. Zook
发明人： Tyson Tuttle , Diwakar Vishakhadatta , Jerrel P. Hein , David R. Welland , David E. Reed , Richard T. Behrens , William G. Bliss , Paul M. Romano , Trent O. Dudley , Christopher P. Zook
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/09 , G11B5/5526 , G11B5/553 , G11B5/5534 , G11B5/5547 , G11B5/58 , G11B5/59605 , G11B5/59622 , G11B5/59633 , G11B5/5965 , G11B5/59688 , G11B19/28 , G11B20/10009 , G11B20/10037 , G11B20/1258 , G11B20/1403
摘要： A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for canceling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.
摘要翻译：包含在磁盘存储系统内的采样幅度读取通道，用于读取在磁性介质上记录的轨道上的数据，其中数据包括以相同数据记录的多个预定义区域和嵌入式伺服数据扇区以变化的数据速率记录的用户数据扇区率跨越区域。读取通道包括用于对位于磁介质上的磁读头的读信号进行同步采样的定时恢复组件，用于调整读信号幅度的增益控制部件和用于消除读信号的DC偏移的DC偏移分量读信号。这些组件被动态配置为根据读通道是处理用户数据还是嵌入式伺服数据进行操作。

8. 发明授权

US6009549A Disk storage system employing error detection and correction of channel coded data, interpolated timing recovery, and retroactive/split-segment symbol synchronization 失效
标题翻译：磁盘存储系统采用通道编码数据的错误检测和校正，内插定时恢复和追溯/分段符号同步
公开(公告)号：US6009549A
公开(公告)日：1999-12-28
申请号：US856885
申请日：1997-05-15
申请人： William G. Bliss , Christopher P. Zook , Richard T. Behrens
发明人： William G. Bliss , Christopher P. Zook , Richard T. Behrens
IPC分类号： G11B5/012 , G11B20/10 , G11B20/14 , G11B20/18 , G11B27/30 , C11C29/00 , G11B5/09
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/1426 , G11B20/1833 , G11B27/3027 , G11B2020/1476 , G11B5/012
摘要： A disk storage system is disclosed wherein user data received from a host system is first encoded according to a first channel code having a high code rate, and then encoded according to an ECC code, such as a Reed-Solomon code, wherein the ECC redundancy symbols are encoded according to a second channel code having low error propagation. In the preferred embodiment, the first channel code is a RLL (d,k) code having a long k constraint which allows for longer block lengths (and higher code rates). During read back, a synchronous read channel samples the analog read signal a synchronously and interpolates the asynchronous sample values to generate sample values substantially synchronized to the baud rate. In contrast to conventional synchronous-sampling timing recovery, interpolated timing recovery can tolerate a longer RLL k constraint because it is less sensitive to noise in the read signal and not affected by process variations in fabrication. Additionally, a trellis sequence detector detects an estimated binary sequence from the synchronous sample values, wherein a state transition diagram of the trellis detector is configured according to the code constraints of the first and second channel codes. The estimated binary sequence output by the sequence detector is buffered in a data buffer to facilitate the error detection and correction process, and to allow for retroactive and split-segment symbol synchronization using multiple sync marks.
摘要翻译：公开了一种磁盘存储系统，其中根据具有高码率的第一信道码首先对从主机系统接收的用户数据进行编码，然后根据诸如Reed-Solomon码的ECC码进行编码，其中ECC冗余符号根据具有低误差传播的第二信道码进行编码。在优选实施例中，第一信道码是具有长k约束的RLL（d，k）码，其允许更长的码块长度（和较高码率）。在读回期间，同步读通道同步地对模拟读取信号进行采样，并内插异步采样值，以生成基本上与波特率同步的采样值。与传统的同步采样定时恢复相比，内插定时恢复可以容忍较长的RLL k约束，因为它对读取信号中的噪声不太敏感，并且不受制造过程变化的影响。另外，网格序列检测器根据同步采样值检测估计的二进制序列，其中根据第一和第二信道码的编码约束配置网格检测器的状态转移图。由序列检测器输出的估计的二进制序列被缓冲在数据缓冲器中，以便于错误检测和校正过程，并允许使用多个同步标记进行追溯和分段符号同步。

9. 发明授权

US5903857A Method and apparatus for calibrating an analog filter in a sampled amplitude read channel 失效
标题翻译：用于校准采样振幅读通道中的模拟滤波器的方法和装置
公开(公告)号：US5903857A
公开(公告)日：1999-05-11
申请号：US751832
申请日：1996-11-18
申请人： Richard T. Behrens , Tyson Tuttle , Kent D. Anderson , Trent O. Dudley , William G. Bliss
发明人： Richard T. Behrens , Tyson Tuttle , Kent D. Anderson , Trent O. Dudley , William G. Bliss
IPC分类号： G11B20/10 , G06F17/10 , G11B5/035
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/10481
摘要： A method and apparatus for calibrating an analog equalizer in a sampled amplitude read channel is disclosed wherein the filter's frequency response is measured and calibrated directly. This is accomplished by injecting a known periodic signal into the analog filter and measuring a spectrum value at a predetermined frequency. The filter parameters are adjusted accordingly until the spectrum reaches a predetermined target value. In the preferred embodiment, the analog filter comprises at least one second order low pass filter (referred to as a biquad filter), and the filter's spectrum is adjusted relative to the well known parameters f.sub.o and Q. Specifically, the parameters f.sub.o and Q are optimized relative to a power measurement at predetermined harmonics of the input signal. In this manner, the present invention enables auto-calibration of the analog equalizer without reading any data from the disc. Furthermore, the calibration process can be executed during the storage system's normal operation without significantly degrading its overall performance.
摘要翻译：公开了一种用于校准采样振幅读通道中的模拟均衡器的方法和装置，其中滤波器的频率响应被直接测量和校准。这是通过将已知的周期信号注入模拟滤波器并以预定频率测量频谱值来实现的。相应地调整滤波器参数，直到频谱达到预定的目标值。在优选实施例中，模拟滤波器包括至少一个二阶低通滤波器（称为双二阶滤波器），并且相对于众所周知的参数fo和Q调节滤波器的频谱。具体地，参数fo和Q是相对于输入信号的预定谐波处的功率测量而优化。以这种方式，本发明能够在不从盘读取任何数据的情况下自动校准模拟均衡器。此外，可以在存储系统的正常操作期间执行校准过程，而不会显着降低其整体性能。

10. 发明授权

US5802118A Sub-sampled discrete time read channel for computer storage systems 失效
标题翻译：用于计算机存储系统的子采样离散时间读通道
公开(公告)号：US5802118A
公开(公告)日：1998-09-01
申请号：US681578
申请日：1996-07-29
申请人： William G. Bliss , David E. Reed , Richard T. Behrens
发明人： William G. Bliss , David E. Reed , Richard T. Behrens
IPC分类号： G11B20/10 , G11B20/14 , H04B1/10
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/1426
摘要： A sampled amplitude read channel is disclosed for reading binary data from a computer disk storage system, wherein the read channel sub-samples an analog read signal at a rate lower than the baud rate and detects the binary data from the sub-sampled values using a sequence detector. In one embodiment, the sub-sampled values are interpolated to generate synchronous sample values which are processed by a conventional sequence detector. In another embodiment, the sequence detector is modified to detect the binary data directly from the sub-sampled values. In yet another embodiment, the sequence detector comprises a remodulator and an error pattern detector for detecting and correcting bit errors in the detected binary data. In addition, for the various embodiments a channel code increases the distance property of the sequence detector in order to compensate for the degradation in performance caused by sub-sampling.
摘要翻译：公开了一种用于从计算机磁盘存储系统读取二进制数据的采样幅度读取通道，其中读取通道以低于波特率的速率对模拟读取信号进行子采样，并使用以下方式从子采样值检测二进制数据：序列检测器。在一个实施例中，子采样值被内插以产生由常规序列检测器处理的同步采样值。在另一个实施例中，修改序列检测器以直接从子采样值检测二进制数据。在另一个实施例中，序列检测器包括重调制器和用于检测和校正检测到的二进制数据中的比特错误的错误模式检测器。此外，对于各种实施例，信道码增加了序列检测器的距离特性，以便补偿由次采样引起的性能下降。

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